/Zephyr-latest/tests/drivers/clock_control/pwm_clock/src/ |
D | main.c | 26 ret = clock_control_get_rate(clk_dev, 0, &clock_rate); in pwm_clock_setup() 27 zassert_equal(0, ret, "%s: Unexpected err (%d) from clock_control_get_rate", in pwm_clock_setup() 45 ret = clock_control_get_rate(clk_dev, 0, &clock_rate); in ZTEST() 46 zassert_equal(0, ret, "%s: Unexpected err (%d) from clock_control_get_rate", in ZTEST() 55 ret = clock_control_get_rate(clk_dev, 0, &clock_rate); in ZTEST() 56 zassert_equal(0, ret, "%s: Unexpected err (%d) from clock_control_get_rate", in ZTEST() 65 ret = clock_control_get_rate(clk_dev, 0, &clock_rate_new); in ZTEST() 66 zassert_equal(0, ret, "%s: Unexpected err (%d) from clock_control_get_rate", in ZTEST()
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/Zephyr-latest/tests/boards/espressif/rtc_clk/src/ |
D | rtc_clk_test.c | 31 ret = clock_control_get_rate(clk_dev, in rtc_clk_setup() 36 ret = clock_control_get_rate( in rtc_clk_setup() 41 ret = clock_control_get_rate( in rtc_clk_setup() 67 ret = clock_control_get_rate( in ZTEST() 107 ret = clock_control_get_rate( in ZTEST() 151 ret = clock_control_get_rate( in ZTEST() 203 ret = clock_control_get_rate( in ZTEST()
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/Zephyr-latest/samples/boards/espressif/xt_wdt/src/ |
D | main.c | 44 clock_control_get_rate(clk_dev, (clock_control_subsys_t)ESP32_CLOCK_CONTROL_SUBSYS_RTC_SLOW, in main() 63 clock_control_get_rate(clk_dev, (clock_control_subsys_t)ESP32_CLOCK_CONTROL_SUBSYS_RTC_SLOW, in main()
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/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/src/ |
D | test_stm32_clock_configuration_lptim.c | 64 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST() 80 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
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D | test_stm32_clock_configuration_i2c.c | 61 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in i2c_set_clock() 113 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
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D | test_stm32_clock_configuration_i2s.c | 56 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
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D | test_stm32_clock_configuration_sdmmc.c | 112 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
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/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32u5_devices/src/ |
D | test_stm32_clock_configuration.c | 76 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST() 89 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
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/Zephyr-latest/boards/arduino/nicla_vision/ |
D | camera_ext_clock.c | 31 ret = clock_control_get_rate(cam_ext_clk_dev, (clock_control_subsys_t)0, &rate); in camera_ext_clock_enable()
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/Zephyr-latest/drivers/clock_control/ |
D | clock_control_si32_apb.c | 38 const int ret = clock_control_get_rate(config->clock_dev, NULL, rate); in clock_control_si32_apb_get_rate()
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/Zephyr-latest/tests/drivers/clock_control/fixed_clock/src/ |
D | test_clock_control.c | 44 err = clock_control_get_rate(dev, 0, &rate); in ZTEST()
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/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32h7_devices/src/ |
D | test_stm32_clock_configuration.c | 112 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST() 125 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
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/Zephyr-latest/drivers/usb/device/ |
D | usb_dc_dw_stm32.h | 40 ret = clock_control_get_rate(clk->dev, in clk_enable_st_stm32f4_fsotg()
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/Zephyr-latest/drivers/mdio/ |
D | mdio_nxp_imx_netc.c | 70 err = clock_control_get_rate(cfg->clock_dev, cfg->clock_subsys, &mdio_config.srcClockHz); in nxp_imx_netc_mdio_initialize()
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/Zephyr-latest/drivers/i2c/ |
D | i2c_ll_stm32.c | 92 if (clock_control_get_rate(clk, (clock_control_subsys_t)&cfg->pclken[1], in i2c_stm32_runtime_configure() 94 LOG_ERR("Failed call clock_control_get_rate(pclken[1])"); in i2c_stm32_runtime_configure() 98 if (clock_control_get_rate(clk, (clock_control_subsys_t)&cfg->pclken[0], in i2c_stm32_runtime_configure() 100 LOG_ERR("Failed call clock_control_get_rate(pclken[0])"); in i2c_stm32_runtime_configure()
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D | i2c_rv32m1_lpi2c.c | 86 err = clock_control_get_rate(config->clock_dev, config->clock_subsys, &clk_freq); in rv32m1_lpi2c_configure() 229 err = clock_control_get_rate(config->clock_dev, config->clock_subsys, &clk_freq); in rv32m1_lpi2c_init()
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D | i2c_mcux_flexcomm.c | 94 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_flexcomm_configure() 359 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_flexcomm_setup_slave_config() 499 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_flexcomm_init()
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/Zephyr-latest/drivers/ptp_clock/ |
D | ptp_clock_nxp_enet.c | 103 (void) clock_control_get_rate(config->clock_dev, config->clock_subsys, in ptp_clock_nxp_enet_rate_adjust() 166 (void) clock_control_get_rate(config->clock_dev, config->clock_subsys, in nxp_enet_ptp_clock_callback()
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/Zephyr-latest/drivers/sensor/st/stm32_digi_temp/ |
D | stm32_digi_temp.c | 186 if (clock_control_get_rate(clk, (clock_control_subsys_t) &cfg->pclken, in stm32_digi_temp_init() 188 LOG_ERR("Failed call clock_control_get_rate(pclken)"); in stm32_digi_temp_init()
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/Zephyr-latest/drivers/pwm/ |
D | pwm_mcux.c | 63 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_pwm_set_cycles_internal() 181 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_pwm_get_cycles_per_sec()
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D | pwm_mcux_sctimer.c | 53 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_sctimer_new_channel() 200 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_sctimer_pwm_get_cycles_per_sec()
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D | pwm_max32.c | 97 ret = clock_control_get_rate(cfg->clock, (clock_control_subsys_t)&cfg->perclk, in api_get_cycles_per_sec()
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/Zephyr-latest/include/zephyr/drivers/ |
D | clock_control.h | 218 static inline int clock_control_get_rate(const struct device *dev, in clock_control_get_rate() function 270 * the right action (such as using the right clock source on clock_control_get_rate
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/Zephyr-latest/drivers/serial/ |
D | uart_wch_usart.c | 40 err = clock_control_get_rate(config->clock_dev, clock_sys, &clock_rate); in usart_wch_init()
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/Zephyr-latest/drivers/watchdog/ |
D | wdt_wwdg_stm32.c | 96 if (clock_control_get_rate(clk, (clock_control_subsys_t) &cfg->pclken, in wwdg_stm32_get_pclk() 98 LOG_ERR("Failed call clock_control_get_rate"); in wwdg_stm32_get_pclk()
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