1 /*
2 * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <stdio.h>
8 #include <zephyr/devicetree.h>
9 #include <zephyr/sys/printk.h>
10 #include <zephyr/drivers/clock_control/esp32_clock_control.h>
11 #include <zephyr/drivers/clock_control.h>
12 #include <zephyr/drivers/watchdog.h>
13 #include <zephyr/kernel.h>
14 #include <zephyr/logging/log.h>
15 LOG_MODULE_REGISTER(xt_wdt_sample, CONFIG_WDT_LOG_LEVEL);
16
17 K_SEM_DEFINE(wdt_sem, 0, 1);
18
19 static const struct device *const clk_dev = DEVICE_DT_GET_ONE(espressif_esp32_rtc);
20 const struct device *const wdt = DEVICE_DT_GET_ONE(espressif_esp32_xt_wdt);
21
wdt_callback(const struct device * wdt_dev,int channel_id)22 static void wdt_callback(const struct device *wdt_dev, int channel_id)
23 {
24 printk("XT WDT callback\n");
25 k_sem_give(&wdt_sem);
26 }
27
main(void)28 int main(void)
29 {
30 uint32_t clk_rate = 0;
31
32 if (!device_is_ready(clk_dev)) {
33 LOG_ERR("Clock device is not ready");
34 return -EIO;
35 }
36
37 if (!device_is_ready(wdt)) {
38 LOG_ERR("XT WDT device is not ready");
39 return -EIO;
40 }
41
42 LOG_INF("XT WDT Sample on %s", CONFIG_BOARD_TARGET);
43
44 clock_control_get_rate(clk_dev, (clock_control_subsys_t)ESP32_CLOCK_CONTROL_SUBSYS_RTC_SLOW,
45 &clk_rate);
46
47 LOG_INF("Current RTC SLOW clock rate: %d Hz", clk_rate);
48
49 /* Set up the watchdog */
50 struct wdt_timeout_cfg wdt_config = {
51 .window.max = 200,
52 .callback = wdt_callback,
53 };
54
55 wdt_install_timeout(wdt, &wdt_config);
56
57 wdt_setup(wdt, 0);
58
59 LOG_INF("Remove the external 32K crystal to trigger the watchdog");
60
61 k_sem_take(&wdt_sem, K_FOREVER);
62
63 clock_control_get_rate(clk_dev, (clock_control_subsys_t)ESP32_CLOCK_CONTROL_SUBSYS_RTC_SLOW,
64 &clk_rate);
65
66 LOG_INF("Current RTC SLOW clock rate: %d Hz", clk_rate);
67
68 return 0;
69 }
70
