| /Zephyr-latest/drivers/gpio/ |
| D | gpio_sam4l.c | 3 * Copyright (c) 2020-2023 Gerson Fernando Budke <nandojve@gmail.com>
5 * SPDX-License-Identifier: Apache-2.0
15 #include <zephyr/drivers/gpio.h>
19 #include <zephyr/drivers/gpio/gpio_utils.h>
26 Gpio *regs;
44 const struct gpio_sam_config * const cfg = dev->config; in gpio_sam_port_configure()
45 Gpio * const gpio = cfg->regs; in gpio_sam_port_configure() local
49 return -ENOTSUP; in gpio_sam_port_configure()
53 gpio->IERC = mask; in gpio_sam_port_configure()
54 gpio->PUERC = mask; in gpio_sam_port_configure()
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| D | gpio_mchp_mss.c | 4 * SPDX-License-Identifier: Apache-2.0
12 #include <zephyr/drivers/gpio.h>
16 #include <zephyr/drivers/gpio/gpio_utils.h>
61 /* Helper Macros for GPIO */
63 ((const struct mss_gpio_config * const)(dev)->config)
65 ((volatile struct mss_gpio_t *)(DEV_GPIO_CFG(dev))->gpio_base_addr)
67 ((struct mss_gpio_data *)(dev)->data)
74 volatile struct mss_gpio_t *gpio = DEV_GPIO(dev); in mss_gpio_config() local
79 return -ENOTSUP; in mss_gpio_config()
84 gpio->gpio_cfg[pin] |= MSS_GPIO_OUTPUT_MODE; in mss_gpio_config()
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| D | gpio_test.c | 5 * SPDX-License-Identifier: Apache-2.0
9 * This is not a real GPIO driver. It is used to instantiate struct
10 * devices for the "vnd,gpio" devicetree compatible used in test code.
15 #include <zephyr/drivers/gpio.h>
16 #include <zephyr/drivers/gpio/gpio_utils.h>
32 return -ENOTSUP; in vnd_gpio_pin_configure()
38 return -ENOTSUP; in vnd_gpio_port_get_raw()
45 return -ENOTSUP; in vnd_gpio_port_set_masked_raw()
51 return -ENOTSUP; in vnd_gpio_port_set_bits_raw()
57 return -ENOTSUP; in vnd_gpio_port_clear_bits_raw()
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| D | gpio_nct38xx.h | 4 * SPDX-License-Identifier: Apache-2.0
11 #include <zephyr/drivers/gpio.h>
19 #define NCT38XX_REG_GPIO_DATA_IN(n) (0xC0 + ((n) * 8)) argument
20 #define NCT38XX_REG_GPIO_DATA_OUT(n) (0xC1 + ((n) * 8)) argument
21 #define NCT38XX_REG_GPIO_DIR(n) (0xC2 + ((n) * 8)) argument
22 #define NCT38XX_REG_GPIO_OD_SEL(n) (0xC3 + ((n) * 8)) argument
23 #define NCT38XX_REG_GPIO_ALERT_RISE(n) (0xC4 + ((n) * 8)) argument
24 #define NCT38XX_REG_GPIO_ALERT_FALL(n) (0xC5 + ((n) * 8)) argument
25 #define NCT38XX_REG_GPIO_ALERT_LEVEL(n) (0xC6 + ((n) * 8)) argument
26 #define NCT38XX_REG_GPIO_ALERT_MASK(n) (0xC7 + ((n) * 8)) argument
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| D | gpio_cmsdk_ahb.c | 4 * SPDX-License-Identifier: Apache-2.0
13 #include <zephyr/drivers/gpio.h>
17 #include <zephyr/drivers/gpio/gpio_cmsdk_ahb.h>
20 #include <zephyr/drivers/gpio/gpio_utils.h>
23 * @brief GPIO driver for ARM CMSDK AHB GPIO
33 /* GPIO Clock control in Active State */
35 /* GPIO Clock control in Sleep State */
37 /* GPIO Clock control in Deep Sleep State */
51 const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config; in gpio_cmsdk_ahb_port_get_raw()
53 *value = cfg->port->data; in gpio_cmsdk_ahb_port_get_raw()
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| D | gpio_numaker.c | 4 * SPDX-License-Identifier: Apache-2.0
11 #include <zephyr/drivers/gpio.h>
14 #include <zephyr/drivers/gpio/gpio_utils.h>
38 const struct gpio_numaker_config *config = dev->config; in gpio_numaker_configure()
39 struct gpio_numaker_data *data = dev->data; in gpio_numaker_configure()
40 GPIO_T *gpio_base = (GPIO_T *)config->reg; in gpio_numaker_configure()
42 uint32_t pinMask = BIT(pin); /* mask for pin index --> (0x01 << pin) */ in gpio_numaker_configure()
52 return -EINVAL; in gpio_numaker_configure()
55 /* Configure GPIO direction */ in gpio_numaker_configure()
67 err = -ENOTSUP; in gpio_numaker_configure()
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| D | gpio_nxp_s32.c | 2 * Copyright 2022-2024 NXP
4 * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/drivers/gpio.h>
11 #include <zephyr/drivers/gpio/gpio_utils.h>
13 #include <zephyr/dt-bindings/gpio/nxp-s32-gpio.h>
26 #define SIUL2_MSCR(n) (0x4 * (n)) argument
27 /* SIUL2 Parallel GPIO Pad Data Out (offset from gpio base) */
29 /* SIUL2 Parallel GPIO Pad Data In */
33 #define GPIO_READ(r) sys_read16(config->gpio_base + (r))
34 #define GPIO_WRITE(r, v) sys_write16((v), config->gpio_base + (r))
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| D | gpio_sedi.c | 3 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/drivers/gpio.h>
11 #include <zephyr/drivers/gpio/gpio_utils.h>
37 const struct gpio_sedi_config *config = dev->config; in gpio_sedi_suspend_device()
38 sedi_gpio_t gpio_dev = config->device; in gpio_sedi_suspend_device()
42 return -EBUSY; in gpio_sedi_suspend_device()
48 return -EIO; in gpio_sedi_suspend_device()
56 const struct gpio_sedi_config *config = dev->config; in gpio_sedi_resume_device_from_suspend()
57 sedi_gpio_t gpio_dev = config->device; in gpio_sedi_resume_device_from_suspend()
62 return -EIO; in gpio_sedi_resume_device_from_suspend()
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| D | gpio_rcar.c | 2 * Copyright (c) 2020-2023 IoT.bzh
4 * SPDX-License-Identifier: Apache-2.0
14 #include <zephyr/drivers/gpio.h>
19 #include <zephyr/drivers/gpio/gpio_utils.h>
25 ((const struct gpio_rcar_cfg *)(_dev)->config)
26 #define DEV_DATA(_dev) ((struct gpio_rcar_data *)(_dev)->data)
83 struct gpio_rcar_data *data = dev->data; in gpio_rcar_port_isr()
91 fsb = find_lsb_set(pending) - 1; in gpio_rcar_port_isr()
92 gpio_fire_callbacks(&data->cb, dev, BIT(fsb)); in gpio_rcar_port_isr()
99 uint32_t gpio, in gpio_rcar_config_general_input_output_mode() argument
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| D | gpio_mchp_xec_v2.c | 4 * SPDX-License-Identifier: Apache-2.0
12 #include <zephyr/drivers/gpio.h>
13 #include <zephyr/dt-bindings/gpio/gpio.h>
15 #include <zephyr/dt-bindings/pinctrl/mchp-xec-pinctrl.h>
19 #include <zephyr/drivers/gpio/gpio_utils.h>
23 LOG_MODULE_REGISTER(gpio, CONFIG_GPIO_LOG_LEVEL);
52 /* Each GPIO pin 32-bit control register located consecutively in memory */
55 const struct gpio_xec_config *config = dev->config; in pin_ctrl_addr()
57 return config->pcr1_base + ((uintptr_t)pin * 4u); in pin_ctrl_addr()
60 /* GPIO Parallel input is a single 32-bit register per bank of 32 pins */
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| D | gpio_cc32xx.c | 4 * SPDX-License-Identifier: Apache-2.0
11 #include <zephyr/drivers/gpio.h>
23 #undef __GPIO_H__ /* Zephyr and CC32XX SDK gpio.h conflict */
24 #include <driverlib/gpio.h>
29 #include <zephyr/drivers/gpio/gpio_utils.h>
50 /* base address of GPIO port */
52 /* GPIO port number */
72 const struct gpio_cc32xx_config *gpio_config = port->config; in gpio_cc32xx_config()
73 unsigned long port_base = gpio_config->port_base; in gpio_cc32xx_config()
76 return -ENOTSUP; in gpio_cc32xx_config()
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| D | gpio_b91.c | 4 * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/drivers/gpio.h>
12 #include <zephyr/drivers/gpio/gpio_utils.h>
19 /* Get GPIO instance */
21 ((const struct gpio_b91_config *)dev->config)->gpio_base)
23 /* Get GPIO IRQ number defined in dts */
24 #define GET_IRQ_NUM(dev) (((const struct gpio_b91_config *)dev->config)->irq_num)
26 /* Get GPIO IRQ priority defined in dts */
27 #define GET_IRQ_PRIORITY(dev) (((const struct gpio_b91_config *)dev->config)->irq_priority)
29 /* Get GPIO port number: port A - 0, port B - 1, ..., port F - 5 */
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| /Zephyr-latest/drivers/input/ |
| D | input_gpio_kbd_matrix.c | 4 * SPDX-License-Identifier: Apache-2.0
13 #include <zephyr/drivers/gpio.h>
47 const struct gpio_kbd_matrix_config *cfg = dev->config; in gpio_kbd_matrix_drive_column()
48 const struct input_kbd_matrix_common_config *common = &cfg->common; in gpio_kbd_matrix_drive_column()
49 struct gpio_kbd_matrix_data *data = dev->data; in gpio_kbd_matrix_drive_column()
55 state = BIT_MASK(common->col_size); in gpio_kbd_matrix_drive_column()
60 if (data->direct_write) { in gpio_kbd_matrix_drive_column()
61 const struct gpio_dt_spec *gpio0 = &cfg->col_gpio[0]; in gpio_kbd_matrix_drive_column()
65 gpio_mask = BIT_MASK(common->col_size) << gpio0->pin; in gpio_kbd_matrix_drive_column()
66 gpio_val = state << gpio0->pin; in gpio_kbd_matrix_drive_column()
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| D | input_gpio_qdec.c | 4 * SPDX-License-Identifier: Apache-2.0
13 #include <zephyr/drivers/gpio.h>
66 const struct gpio_qdec_config *cfg = dev->config; in gpio_qdec_irq_setup()
71 const struct gpio_dt_spec *gpio = &cfg->ab_gpio[i]; in gpio_qdec_irq_setup() local
73 ret = gpio_pin_interrupt_configure_dt(gpio, flags); in gpio_qdec_irq_setup()
83 const struct gpio_qdec_config *cfg = dev->config; in gpio_qdec_idle_polling_mode()
85 if (cfg->idle_poll_time_us > 0) { in gpio_qdec_idle_polling_mode()
94 const struct gpio_qdec_config *cfg = dev->config; in gpio_qdec_poll_mode()
95 struct gpio_qdec_data *data = dev->data; in gpio_qdec_poll_mode()
101 k_timer_start(&data->sample_timer, K_NO_WAIT, in gpio_qdec_poll_mode()
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| /Zephyr-latest/dts/bindings/gpio/ |
| D | xlnx,xps-gpio-1.00.a.yaml | 1 description: Xilinx AXI GPIO IP node
3 compatible: "xlnx,xps-gpio-1.00.a"
5 include: [gpio-controller.yaml, base.yaml]
7 bus: xlnx,xps-gpio-1.00.a
10 # https://github.com/Xilinx/device-tree-xlnx
16 xlnx,all-inputs:
21 xlnx,all-outputs:
26 xlnx,dout-default:
29 Default output value. If n-th bit is 1, GPIO-n default value is 1.
31 xlnx,gpio-width:
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| /Zephyr-latest/samples/boards/espressif/deep_sleep/src/ |
| D | main.c | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/drivers/gpio.h>
21 #error "Unsupported: wakeup-button alias is not defined"
36 int pin = __builtin_ffsll(wakeup_pin_mask) - 1; in main()
38 printk("Wake up from GPIO %d\n", pin); in main()
40 printk("Wake up from GPIO\n"); in main()
51 int pin = __builtin_ffsll(wakeup_pin_mask) - 1; in main()
53 printk("Wake up from GPIO %d\n", pin); in main()
55 printk("Wake up from GPIO\n"); in main()
61 printk("Wake up from timer.\n"); in main()
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| /Zephyr-latest/soc/arm/mps3/ |
| D | soc.c | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/drivers/gpio/gpio_mmio32.h>
9 #include <zephyr/linker/linker-defs.h>
12 /* Setup GPIO drivers for accessing FPGAIO registers */
13 #define FPGAIO_NODE(n) DT_INST(n, arm_mps3_fpgaio_gpio) argument
14 #define FPGAIO_INIT(n) \ argument
15 GPIO_MMIO32_INIT(FPGAIO_NODE(n), \
16 DT_REG_ADDR(FPGAIO_NODE(n)), \
17 BIT_MASK(DT_PROP(FPGAIO_NODE(n), ngpios)))
19 /* We expect there to be 3 arm,mps3-fpgaio-gpio devices:
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| /Zephyr-latest/samples/basic/custom_dts_binding/src/ |
| D | main.c | 4 * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/drivers/gpio.h>
25 printf("The load switch pin GPIO port is not ready.\n"); in main()
29 printf("Initializing pin with inactive level.\n"); in main()
33 printf("Configuring GPIO pin failed: %d\n", err); in main()
37 printf("Waiting one second.\n"); in main()
41 printf("Setting pin to active level.\n"); in main()
45 printf("Setting GPIO pin level failed: %d\n", err); in main()
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| /Zephyr-latest/samples/boards/st/power_mgmt/wkup_pins/src/ |
| D | main.c | 4 * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/drivers/gpio.h>
13 #include <zephyr/dt-bindings/gpio/stm32-gpio.h>
28 printk("\nWake-up button is connected to %s pin %d\n", button.port->name, button.pin); in main()
34 /* Setup button GPIO pin as a source for exiting Poweroff */ in main()
37 printk("Will wait %ds before powering the system off\n", (WAIT_TIME_US / 1000000)); in main()
40 printk("Powering off\n"); in main()
41 printk("Press the user button to power the system on\n\n"); in main()
44 /* Will remain powered off until wake-up or reset button is pressed */ in main()
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| /Zephyr-latest/drivers/mipi_dbi/ |
| D | mipi_dbi_bitbang.c | 2 * MIPI DBI Type A and B driver using GPIO
6 * SPDX-License-Identifier: Apache-2.0
12 #include <zephyr/drivers/gpio.h>
20 /* Compile in a data bus LUT for improved performance if at least one instance uses an 8-bit bus */
21 #define _8_BIT_MODE_PRESENT(n) (DT_INST_PROP_LEN(n, data_gpios) == 8) | argument
29 /* Read (type B) GPIO */
32 /* Write (type B) or Read/!Write (type A) GPIO */
35 /* Enable/strobe GPIO (type A) */
38 /* Chip-select GPIO */
41 /* Command/Data GPIO */
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| D | mipi_dbi_stm32_fmc.c | 4 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/drivers/gpio.h>
20 /* Reset GPIO */
22 /* Power GPIO */
38 const struct mipi_dbi_stm32_fmc_config *config = dev->config; in mipi_dbi_stm32_fmc_check_config()
39 struct mipi_dbi_stm32_fmc_data *data = dev->data; in mipi_dbi_stm32_fmc_check_config()
42 if (data->dbi_config == dbi_config) { in mipi_dbi_stm32_fmc_check_config()
46 if (dbi_config->mode != MIPI_DBI_MODE_8080_BUS_16_BIT) { in mipi_dbi_stm32_fmc_check_config()
47 LOG_ERR("Only support Intel 8080 16-bits"); in mipi_dbi_stm32_fmc_check_config()
48 return -ENOTSUP; in mipi_dbi_stm32_fmc_check_config()
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| /Zephyr-latest/include/zephyr/devicetree/ |
| D | gpio.h | 3 * @brief GPIO Devicetree macro public API header file.
10 * SPDX-License-Identifier: Apache-2.0
21 * @defgroup devicetree-gpio Devicetree GPIO API
28 * gpio phandle-array property at an index
32 * gpio1: gpio@... { };
34 * gpio2: gpio@... { };
36 * n: node {
43 * DT_GPIO_CTLR_BY_IDX(DT_NODELABEL(n), gpios, 1) // DT_NODELABEL(gpio2)
46 * @param gpio_pha lowercase-and-underscores GPIO property with
47 * type "phandle-array"
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| /Zephyr-latest/samples/boards/ti/cc13x2_cc26x2/system_off/src/ |
| D | main.c | 5 * SPDX-License-Identifier: Apache-2.0
12 #include <zephyr/drivers/gpio.h>
29 printk("\n%s system off demo\n", CONFIG_BOARD); in main()
36 printk("%s: device not ready.\n", sw0_gpio.port->name); in main()
42 /* Set wakeup bits for button gpio */ in main()
47 printk("Busy-wait %u s\n", BUSY_WAIT_S); in main()
50 printk("Sleep %u us (IDLE)\n", SLEEP_US); in main()
53 printk("Sleep %u s (STANDBY)\n", SLEEP_S); in main()
56 printk("Powering off; press BUTTON1 to restart\n"); in main()
58 /* Clear GPIO interrupt */ in main()
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| /Zephyr-latest/boards/silabs/starter_kits/slstk3701a/ |
| D | board.c | 5 * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/drivers/gpio.h>
22 printk("Ethernet PHY power gpio port is not ready!\n"); in efm32gg_stk3701a_init()
23 return -ENODEV; in efm32gg_stk3701a_init()
32 printk("Ethernet reference clock gpio port is not ready!\n"); in efm32gg_stk3701a_init()
33 return -ENODEV; in efm32gg_stk3701a_init()
42 CMU->CTRL |= CMU_CTRL_CLKOUTSEL2_HFXO; in efm32gg_stk3701a_init()
43 CMU->ROUTELOC0 = (CMU->ROUTELOC0 & ~_CMU_ROUTELOC0_CLKOUT2LOC_MASK) | in efm32gg_stk3701a_init()
45 CMU->ROUTEPEN |= CMU_ROUTEPEN_CLKOUT2PEN; in efm32gg_stk3701a_init()
50 printk("Ethernet PHY reset gpio port is not ready!\n"); in efm32gg_stk3701a_init()
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| /Zephyr-latest/samples/boards/nordic/system_off/src/ |
| D | main.c | 4 * SPDX-License-Identifier: Apache-2.0
13 #include <zephyr/drivers/gpio.h>
37 printf("%s: device not ready.\n", cons->name); in main()
41 printf("\n%s system off demo\n", CONFIG_BOARD); in main()
50 printf("Retained data: %s\n", retained_ok ? "valid" : "INVALID"); in main()
51 printf("Boot count: %u\n", retained.boots); in main()
52 printf("Off count: %u\n", retained.off_count); in main()
53 printf("Active Ticks: %" PRIu64 "\n", retained.uptime_sum); in main()
55 printf("Retained data not supported\n"); in main()
62 printk("Unable to prepare GRTC as a wake up source (err = %d).\n", err); in main()
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