Home
last modified time | relevance | path

Searched defs:base (Results 26 – 50 of 423) sorted by relevance

12345678910>>...17

/Zephyr-latest/drivers/pcie/host/
Dmsi.c15 uint32_t base; in pcie_msi_base() local
71 uint32_t base) in get_msix_table_size()
81 uint32_t base, in map_msix_table_entries()
129 uint32_t base) in get_msi_mmc()
145 uint32_t base; in pcie_msi_vectors_allocate() local
183 uint32_t base; in pcie_msi_vector_connect() local
200 uint32_t base, in enable_msix()
226 uint32_t base) in disable_msi()
238 uint32_t base, in enable_msi()
274 uint32_t base; in pcie_msi_enable() local
/Zephyr-latest/drivers/counter/
Dcounter_mcux_tpm.c51 TPM_Type *base = get_base(dev); in mcux_tpm_start() local
60 TPM_Type *base = get_base(dev); in mcux_tpm_stop() local
69 TPM_Type *base = get_base(dev); in mcux_tpm_get_value() local
79 TPM_Type *base = get_base(dev); in mcux_tpm_set_alarm() local
117 TPM_Type *base = get_base(dev); in mcux_tpm_cancel_alarm() local
133 TPM_Type *base = get_base(dev); in mcux_tpm_isr() local
158 TPM_Type *base = get_base(dev); in mcux_tpm_get_pending_int() local
167 TPM_Type *base = get_base(dev); local
204 TPM_Type *base = get_base(dev); local
222 TPM_Type *base; local
Dcounter_nxp_mrt.c54 MRT_Type *base; member
66 MRT_Type *base = config->base; in nxp_mrt_stop() local
81 MRT_Type *base = config->base; in nxp_mrt_start() local
103 MRT_Type *base = config->base; in nxp_mrt_get_value() local
115 MRT_Type *base = config->base; in nxp_mrt_set_top_value() local
165 MRT_Type *base = config->base; in nxp_mrt_get_top_value() local
174 MRT_Type *base = config->base; in nxp_mrt_get_pending_int() local
214 MRT_Type *base = config->base; in nxp_mrt_init() local
245 MRT_Type *base = config->base; in nxp_mrt_isr() local
/Zephyr-latest/drivers/watchdog/
Dwdt_dw_common.c33 int dw_wdt_configure(const uint32_t base, const uint32_t config) in dw_wdt_configure()
58 int dw_wdt_calc_period(const uint32_t base, const uint32_t clk_freq, in dw_wdt_calc_period()
90 int dw_wdt_probe(const uint32_t base, const uint32_t reset_pulse_length) in dw_wdt_probe()
Dwdt_mcux_imx_wdog.c22 WDOG_Type *base; member
37 WDOG_Type *base = config->base; in mcux_wdog_setup() local
60 WDOG_Type *base = config->base; in mcux_wdog_disable() local
109 WDOG_Type *base = config->base; in mcux_wdog_feed() local
126 WDOG_Type *base = config->base; in mcux_wdog_isr() local
Dwdt_mcux_wdog.c22 WDOG_Type *base; member
38 WDOG_Type *base = config->base; in mcux_wdog_setup() local
61 WDOG_Type *base = config->base; in mcux_wdog_disable() local
122 WDOG_Type *base = config->base; in mcux_wdog_feed() local
139 WDOG_Type *base = config->base; in mcux_wdog_isr() local
Dwdt_mcux_wwdt.c26 WWDT_Type *base; member
41 WWDT_Type *base = config->base; in mcux_wwdt_setup() local
58 WWDT_Type *base = config->base; in mcux_wwdt_disable() local
142 WWDT_Type *base = config->base; in mcux_wwdt_feed() local
159 WWDT_Type *base = config->base; in mcux_wwdt_isr() local
/Zephyr-latest/drivers/ipm/
Dipm_imx.c33 MU_Type *base; member
53 static inline bool MU_IsRxFull(MU_Type *base, uint32_t index) in MU_IsRxFull()
81 static inline bool MU_IsTxEmpty(MU_Type *base, uint32_t index) in MU_IsTxEmpty()
103 MU_Type *base = MU(config); in imx_mu_isr() local
168 MU_Type *base = MU(config); in imx_mu_ipm_send() local
252 MU_Type *base = MU(config); in imx_mu_ipm_set_enabled() local
333 MU_Type * base = MU(config); in imx_mu_init() local
/Zephyr-latest/drivers/gpio/
Dgpio_iproc.c33 mem_addr_t base; member
49 mem_addr_t base = cfg->base; in gpio_iproc_configure() local
66 mem_addr_t base = cfg->base; in gpio_iproc_port_get_raw() local
76 mem_addr_t base = cfg->base; in gpio_iproc_port_set_masked_raw() local
88 mem_addr_t base = cfg->base; in gpio_iproc_port_set_bits_raw() local
99 mem_addr_t base = cfg->base; in gpio_iproc_port_clear_bits_raw() local
113 mem_addr_t base = cfg->base; in gpio_iproc_port_toggle_bits() local
127 mem_addr_t base = cfg->base; in gpio_iproc_pin_interrupt_configure() local
161 mem_addr_t base = cfg->base; in gpio_iproc_isr() local
Dgpio_mcux_rgpio.c47 RGPIO_Type *base = (RGPIO_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_rgpio_configure() local
156 RGPIO_Type *base = (RGPIO_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_rgpio_port_get_raw() local
167 RGPIO_Type *base = (RGPIO_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_rgpio_port_set_masked_raw() local
177 RGPIO_Type *base = (RGPIO_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_rgpio_port_set_bits_raw() local
187 RGPIO_Type *base = (RGPIO_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_rgpio_port_clear_bits_raw() local
197 RGPIO_Type *base = (RGPIO_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_rgpio_port_toggle_bits() local
209 RGPIO_Type *base = (RGPIO_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_rgpio_pin_interrupt_configure() local
260 RGPIO_Type *base = (RGPIO_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_rgpio_port_isr() local
Dgpio_bcm2711.c17 #define GPFSEL(base, n) (base + 0x00 + 0x04 * n) argument
18 #define GPSET(base, n) (base + 0x1C + 0x04 * n) argument
19 #define GPCLR(base, n) (base + 0x28 + 0x04 * n) argument
20 #define GPLEV(base, n) (base + 0x34 + 0x04 * n) argument
21 #define GPEDS(base, n) (base + 0x40 + 0x04 * n) argument
22 #define GPREN(base, n) (base + 0x4C + 0x04 * n) argument
23 #define GPFEN(base, n) (base + 0x58 + 0x04 * n) argument
24 #define GPHEN(base, n) (base + 0x64 + 0x04 * n) argument
25 #define GPLEN(base, n) (base + 0x70 + 0x04 * n) argument
26 #define GPAREN(base, n) (base + 0x7C + 0x04 * n) argument
[all …]
Dgpio_mcux_igpio.c55 GPIO_Type *base = get_base(dev); in mcux_igpio_configure() local
221 GPIO_Type *base = get_base(dev); in mcux_igpio_port_get_raw() local
232 GPIO_Type *base = get_base(dev); in mcux_igpio_port_set_masked_raw() local
242 GPIO_Type *base = get_base(dev); in mcux_igpio_port_set_bits_raw() local
252 GPIO_Type *base = get_base(dev); in mcux_igpio_port_clear_bits_raw() local
262 GPIO_Type *base = get_base(dev); in mcux_igpio_port_toggle_bits() local
275 GPIO_Type *base = get_base(dev); in mcux_igpio_pin_interrupt_configure() local
340 GPIO_Type *base = get_base(dev); in mcux_igpio_port_isr() local
Dgpio_imx.c24 GPIO_Type *base; member
40 GPIO_Type *base = config->base; in imx_gpio_configure() local
121 GPIO_Type *base = config->base; in imx_gpio_port_get_raw() local
133 GPIO_Type *base = config->base; in imx_gpio_port_set_masked_raw() local
147 GPIO_Type *base = config->base; in imx_gpio_port_set_bits_raw() local
160 GPIO_Type *base = config->base; in imx_gpio_port_clear_bits_raw() local
173 GPIO_Type *base = config->base; in imx_gpio_port_toggle_bits() local
188 GPIO_Type *base = config->base; in imx_gpio_pin_interrupt_configure() local
/Zephyr-latest/drivers/ethernet/
Deth_cyclonev_priv.h123 #define EMAC_DMAGRP_BUS_MODE_ADDR(base) (uint32_t)((base) + EMAC_DMA_MODE_OFST) /* Bus Mode */ argument
124 #define EMAC_DMA_RX_DESC_LIST_ADDR(base) (uint32_t)((base) + EMAC_DMA_RX_DESC_LIST_OFST) argument
126 #define EMAC_DMA_TX_DESC_LIST_ADDR(base) (uint32_t)((base) + EMAC_DMA_TX_DESC_LIST_OFST) argument
128 #define EMAC_DMAGRP_OPERATION_MODE_ADDR(base) (uint32_t)((base) + EMAC_DMAGRP_OPERATION_MODE_OFST) argument
130 #define EMAC_DMAGRP_STATUS_ADDR(base) (uint32_t)((base) + EMAC_DMAGRP_STATUS_OFST) /* Status */ argument
131 #define EMAC_DMAGRP_DEBUG_ADDR(base) (uint32_t)((base) + EMAC_DMAGRP_DEBUG_OFST) /* Debug */ argument
132 #define EMAC_DMA_INT_EN_ADDR(base) (uint32_t)((base) + EMAC_DMA_INT_EN_OFST) argument
134 #define EMAC_DMAGRP_AXI_BUS_MODE_ADDR(base) (uint32_t)((base) + EMAC_DMAGRP_AXI_BUS_MODE_OFST) argument
136 #define EMAC_DMAGRP_AHB_OR_AXI_STATUS_ADDR(base) \ argument
139 #define GMACGRP_CONTROL_STATUS_ADDR(base) \ argument
[all …]
/Zephyr-latest/drivers/interrupt_controller/
Dintc_miwu.c76 uintptr_t base; member
132 const uint32_t base = config->base; in npcx_miwu_set_pseudo_both_edge() local
149 const uint32_t base = config->base; in intc_miwu_isr_pri() local
181 const uint32_t base = config->base; in npcx_miwu_irq_enable() local
203 const uint32_t base = config->base; in npcx_miwu_irq_disable() local
211 const uint32_t base = config->base; in npcx_miwu_io_enable() local
219 const uint32_t base = config->base; in npcx_miwu_io_disable() local
227 const uint32_t base = config->base; in npcx_miwu_irq_get_state() local
235 const uint32_t base = config->base; in npcx_miwu_irq_get_and_clear_pending() local
265 const uint32_t base = config->base; in npcx_miwu_interrupt_configure() local
/Zephyr-latest/drivers/ethernet/eth_nxp_enet_qos/
Deth_nxp_enet_qos_mac.c63 enet_qos_t *base = config->base; in eth_nxp_enet_qos_tx() local
254 enet_qos_t *base = config->base; in eth_nxp_enet_qos_mac_isr() local
295 static inline int enet_qos_dma_reset(enet_qos_t *base) in enet_qos_dma_reset()
333 static inline void enet_qos_dma_config_init(enet_qos_t *base) in enet_qos_dma_config_init()
341 static inline void enet_qos_mtl_config_init(enet_qos_t *base) in enet_qos_mtl_config_init()
368 static inline void enet_qos_mac_config_init(enet_qos_t *base, in enet_qos_mac_config_init()
408 static inline void enet_qos_start(enet_qos_t *base) in enet_qos_start()
435 static inline void enet_qos_tx_desc_init(enet_qos_t *base, struct nxp_enet_qos_tx_data *tx) in enet_qos_tx_desc_init()
451 static inline int enet_qos_rx_desc_init(enet_qos_t *base, struct nxp_enet_qos_rx_data *rx) in enet_qos_rx_desc_init()
520 enet_qos_t *base = module_cfg->base; in eth_nxp_enet_qos_mac_init() local
[all …]
/Zephyr-latest/tests/subsys/ipc/ipc_sessions/common/
Dtest_commands.h42 struct ipc_test_cmd base; member
50 struct ipc_test_cmd base; member
58 struct ipc_test_cmd base; member
68 struct ipc_test_cmd base; member
77 struct ipc_test_cmd base; member
/Zephyr-latest/drivers/i2c/
Di2c_ite_it8xxx2.c43 uint8_t *base; member
169 uint8_t *base = config->base; in i2c_get_line_levels() local
178 uint8_t *base = config->base; in i2c_is_busy() local
197 uint8_t *base = config->base; in i2c_reset() local
325 uint8_t *base = config->base; in i2c_r_last_byte() local
340 uint8_t *base = config->base; in i2c_w2r_change_direction() local
397 uint8_t *base = config->base; in i2c_tran_fifo_write_start() local
439 uint8_t *base = config->base; in i2c_tran_fifo_write_next_block() local
458 uint8_t *base = config->base; in i2c_tran_fifo_write_finish() local
472 uint8_t *base = config->base; in i2c_tran_fifo_w2r_change_direction() local
[all …]
Di2c_cc32xx.c65 uint32_t base; member
87 uint32_t base = DEV_BASE(dev); in i2c_cc32xx_configure() local
119 uint32_t base = DEV_BASE(dev); in i2c_cc32xx_prime_transfer() local
194 static void i2c_cc32xx_isr_handle_write(uint32_t base, in i2c_cc32xx_isr_handle_write()
231 static void i2c_cc32xx_isr_handle_read(uint32_t base, in i2c_cc32xx_isr_handle_read()
265 uint32_t base = DEV_BASE(dev); in i2c_cc32xx_isr() local
327 uint32_t base = DEV_BASE(dev); in i2c_cc32xx_init() local
Di2c_bcm_iproc.c156 mem_addr_t base; member
177 mem_addr_t base = DEV_BASE(dev); in iproc_i2c_enable_disable() local
191 mem_addr_t base = DEV_BASE(dev); in iproc_i2c_reset_controller() local
210 mem_addr_t base = DEV_BASE(dev); in iproc_i2c_target_set_address() local
230 mem_addr_t base = DEV_BASE(dev); in iproc_i2c_target_init() local
274 mem_addr_t base = DEV_BASE(dev); in iproc_i2c_check_target_status() local
306 mem_addr_t base = DEV_BASE(dev); in iproc_i2c_target_read() local
343 mem_addr_t base = DEV_BASE(dev); in iproc_i2c_target_rx() local
373 mem_addr_t base = DEV_BASE(dev); in iproc_i2c_target_isr() local
461 mem_addr_t base = DEV_BASE(dev); in iproc_i2c_target_register() local
[all …]
/Zephyr-latest/lib/libc/minimal/source/stdlib/
Dqsort.c52 static void sift_down(void *base, int start, int end, size_t size, struct qsort_comp *cmp) in sift_down()
79 static void heapify(void *base, int nmemb, size_t size, struct qsort_comp *cmp) in heapify()
88 static void heap_sort(void *base, int nmemb, size_t size, struct qsort_comp *cmp) in heap_sort()
100 void qsort_r(void *base, size_t nmemb, size_t size, in qsort_r()
114 void qsort(void *base, size_t nmemb, size_t size, in qsort()
/Zephyr-latest/arch/x86/
Dgen_gdt.py84 def chop_base_limit(base, limit): argument
99 def create_code_data_entry(base, limit, dpl, flags, access): argument
128 def create_tss_entry(base, limit, dpl): argument
/Zephyr-latest/drivers/adc/
Dadc_mcux_gau_adc.c24 ADC_Type *base; member
48 ADC_Type *base = config->base; in mcux_gau_adc_channel_setup() local
137 ADC_Type *base = config->base; in mcux_gau_adc_read_samples() local
154 ADC_Type *base = config->base; in mcux_gau_adc_isr() local
172 ADC_Type *base = config->base; in adc_context_start_sampling() local
193 ADC_Type *base = config->base; in mcux_gau_adc_do_read() local
310 ADC_Type *base = config->base; in mcux_gau_adc_init() local
/Zephyr-latest/drivers/mdio/
Dmdio_nxp_enet_qos.c35 enet_qos_t *base; member
39 static bool check_busy(enet_qos_t *base) in check_busy()
49 enet_qos_t *base = mdio->base; in do_transaction() local
115 enet_qos_t *base = ENET_QOS_MODULE_CFG(config->enet_dev)->base; in nxp_enet_qos_mdio_read() local
134 enet_qos_t *base = ENET_QOS_MODULE_CFG(config->enet_dev)->base; in nxp_enet_qos_mdio_write() local
/Zephyr-latest/drivers/spi/spi_nxp_lpspi/
Dspi_nxp_lpspi.c19 static inline uint8_t rx_fifo_cur_len(LPSPI_Type *base) in rx_fifo_cur_len()
24 static inline uint8_t tx_fifo_cur_len(LPSPI_Type *base) in tx_fifo_cur_len()
33 LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in lpspi_rx_word_write_bytes() local
72 LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in lpspi_handle_rx_irq() local
118 LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in lpspi_fill_tx_fifo() local
133 LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in lpspi_fill_tx_fifo_nop() local
166 LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in lpspi_handle_tx_irq() local
185 LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in lpspi_isr() local
230 LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in transceive() local

12345678910>>...17