| /trusted-firmware-a-latest/drivers/brcm/spi/ |
| D | iproc_qspi.c | 31 struct bcmspi_priv *priv = NULL; in iproc_qspi_setup() local
34 priv = &spi_cfg; in iproc_qspi_setup()
35 priv->spi_mode = mode; in iproc_qspi_setup()
36 priv->state = QSPI_STATE_DISABLED; in iproc_qspi_setup()
37 priv->bspi_hw = QSPI_BSPI_MODE_REG_BASE; in iproc_qspi_setup()
38 priv->mspi_hw = QSPI_MSPI_MODE_REG_BASE; in iproc_qspi_setup()
44 priv->max_hz = max_hz; in iproc_qspi_setup()
47 mmio_write_32(priv->mspi_hw + MSPI_SPCR1_LSB_REG, 0); in iproc_qspi_setup()
48 mmio_write_32(priv->mspi_hw + MSPI_SPCR1_MSB_REG, 0); in iproc_qspi_setup()
49 mmio_write_32(priv->mspi_hw + MSPI_NEWQP_REG, 0); in iproc_qspi_setup()
[all …]
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| /trusted-firmware-a-latest/drivers/st/clk/ |
| D | clk-stm32-core.c | 59 struct clk_oscillator_data *clk_oscillator_get_data(struct stm32_clk_priv *priv, int id) in clk_oscillator_get_data() argument
61 const struct clk_stm32 *clk = _clk_get(priv, id); in clk_oscillator_get_data()
65 return &priv->osci_data[osc_id]; in clk_oscillator_get_data()
68 void clk_oscillator_set_bypass(struct stm32_clk_priv *priv, int id, bool digbyp, bool bypass) in clk_oscillator_set_bypass() argument
70 struct clk_oscillator_data *osc_data = clk_oscillator_get_data(priv, id); in clk_oscillator_set_bypass()
79 address = priv->base + bypass_data->offset; in clk_oscillator_set_bypass()
90 void clk_oscillator_set_css(struct stm32_clk_priv *priv, int id, bool css) in clk_oscillator_set_css() argument
92 struct clk_oscillator_data *osc_data = clk_oscillator_get_data(priv, id); in clk_oscillator_set_css()
101 address = priv->base + css_data->offset; in clk_oscillator_set_css()
108 void clk_oscillator_set_drive(struct stm32_clk_priv *priv, int id, uint8_t lsedrv) in clk_oscillator_set_drive() argument
[all …]
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| D | clk-stm32-core.h | 46 unsigned long (*recalc_rate)(struct stm32_clk_priv *priv, int id, unsigned long rate);
47 int (*get_parent)(struct stm32_clk_priv *priv, int id);
48 int (*set_rate)(struct stm32_clk_priv *priv, int id, unsigned long rate,
50 int (*enable)(struct stm32_clk_priv *priv, int id);
51 void (*disable)(struct stm32_clk_priv *priv, int id);
52 bool (*is_enabled)(struct stm32_clk_priv *priv, int id);
53 void (*init)(struct stm32_clk_priv *priv, int id);
147 int clk_stm32_init(struct stm32_clk_priv *priv, uintptr_t base);
152 int clk_get_index(struct stm32_clk_priv *priv, unsigned long binding_id);
153 const struct clk_stm32 *_clk_get(struct stm32_clk_priv *priv, int id);
[all …]
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| D | clk-stm32mp13.c | 955 static void clk_oscillator_check_bypass(struct stm32_clk_priv *priv, int idx, in clk_oscillator_check_bypass() argument
958 struct clk_oscillator_data *osc_data = clk_oscillator_get_data(priv, idx); in clk_oscillator_check_bypass()
966 address = priv->base + bypass_data->offset; in clk_oscillator_check_bypass()
974 static void stm32_enable_oscillator_hse(struct stm32_clk_priv *priv) in stm32_enable_oscillator_hse() argument
976 struct stm32_clk_platdata *pdata = priv->pdata; in stm32_enable_oscillator_hse()
982 if (_clk_stm32_get_rate(priv, _CK_HSE) == 0U) { in stm32_enable_oscillator_hse()
986 clk_oscillator_set_bypass(priv, _CK_HSE, digbyp, bypass); in stm32_enable_oscillator_hse()
988 _clk_stm32_enable(priv, _CK_HSE); in stm32_enable_oscillator_hse()
991 clk_oscillator_check_bypass(priv, _CK_HSE, digbyp, bypass); in stm32_enable_oscillator_hse()
994 clk_oscillator_set_css(priv, _CK_HSE, css); in stm32_enable_oscillator_hse()
[all …]
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| /trusted-firmware-a-latest/drivers/brcm/ |
| D | ocotp.c | 121 struct otpc_priv *priv = &otpc_info; in bcm_otpc_ecc() local
124 set_command(priv->base, OTPC_CMD_ECC); in bcm_otpc_ecc()
125 set_cpu_address(priv->base, OTPC_ECC_ADDR); in bcm_otpc_ecc()
128 write_cpu_data(priv->base, OTPC_ECC_VAL); in bcm_otpc_ecc()
130 write_cpu_data(priv->base, ~OTPC_ECC_VAL); in bcm_otpc_ecc()
132 set_start_bit(priv->base); in bcm_otpc_ecc()
133 ret = poll_cpu_status(priv->base, OTPC_STAT_CMD_DONE); in bcm_otpc_ecc()
138 reset_start_bit(priv->base); in bcm_otpc_ecc()
151 struct otpc_priv *priv = &otpc_info; in bcm_otpc_read() local
154 uint32_t address = offset / priv->map->word_size; in bcm_otpc_read()
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| /trusted-firmware-a-latest/drivers/st/ddr/ |
| D | stm32mp1_ddr.c | 276 static void stm32mp1_wait_operating_mode(struct stm32mp_ddr_priv *priv, uint32_t mode) in stm32mp1_wait_operating_mode() argument
287 stat = mmio_read_32((uintptr_t)&priv->ctl->stat); in stm32mp1_wait_operating_mode()
291 (uintptr_t)&priv->ctl->stat, stat); in stm32mp1_wait_operating_mode()
321 (uintptr_t)&priv->ctl->stat, stat); in stm32mp1_wait_operating_mode()
325 static void stm32mp1_mode_register_write(struct stm32mp_ddr_priv *priv, uint8_t addr, in stm32mp1_mode_register_write() argument
338 while ((mmio_read_32((uintptr_t)&priv->ctl->mrstat) & in stm32mp1_mode_register_write()
351 mmio_write_32((uintptr_t)&priv->ctl->mrctrl0, mrctrl0); in stm32mp1_mode_register_write()
353 (uintptr_t)&priv->ctl->mrctrl0, in stm32mp1_mode_register_write()
354 mmio_read_32((uintptr_t)&priv->ctl->mrctrl0), mrctrl0); in stm32mp1_mode_register_write()
355 mmio_write_32((uintptr_t)&priv->ctl->mrctrl1, data); in stm32mp1_mode_register_write()
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| D | stm32mp1_ram.c | 26 int stm32mp1_ddr_clk_enable(struct stm32mp_ddr_priv *priv, uint32_t mem_speed) in stm32mp1_ddr_clk_enable() argument
55 struct stm32mp_ddr_priv *priv = &ddr_priv_data; in stm32mp1_ddr_setup() local
93 mmio_clrbits_32(priv->rcc + RCC_DDRITFCR, RCC_DDRITFCR_AXIDCGEN); in stm32mp1_ddr_setup()
95 stm32mp1_ddr_init(priv, &config); in stm32mp1_ddr_setup()
98 mmio_setbits_32(priv->rcc + RCC_DDRITFCR, RCC_DDRITFCR_AXIDCGEN); in stm32mp1_ddr_setup()
100 priv->info.size = config.info.size; in stm32mp1_ddr_setup()
103 (uint32_t)priv->info.base, (uint32_t)priv->info.size); in stm32mp1_ddr_setup()
141 struct stm32mp_ddr_priv *priv = &ddr_priv_data; in stm32mp1_ddr_probe() local
145 priv->ctl = (struct stm32mp_ddrctl *)stm32mp_ddrctrl_base(); in stm32mp1_ddr_probe()
146 priv->phy = (struct stm32mp_ddrphy *)stm32mp_ddrphyc_base(); in stm32mp1_ddr_probe()
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| D | stm32mp_ddr.c | 18 static uintptr_t get_base_addr(const struct stm32mp_ddr_priv *priv, enum stm32mp_ddr_base_type base) in get_base_addr() argument
21 return (uintptr_t)priv->phy; in get_base_addr()
23 return (uintptr_t)priv->ctl; in get_base_addr()
27 void stm32mp_ddr_set_reg(const struct stm32mp_ddr_priv *priv, enum stm32mp_ddr_reg_type type, in stm32mp_ddr_set_reg() argument
33 uintptr_t base_addr = get_base_addr(priv, base); in stm32mp_ddr_set_reg()
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| /trusted-firmware-a-latest/drivers/nxp/ddr/nxp-ddr/ |
| D | ddr.c | 432 int cal_board_params(struct ddr_info *priv, in cal_board_params() argument
436 const unsigned long speed = priv->clk / 1000000; in cal_board_params()
437 const struct dimm_params *pdimm = &priv->dimm; in cal_board_params()
438 struct memctl_opt *popts = &priv->opt; in cal_board_params()
474 static int synthesize_ctlr(struct ddr_info *priv) in synthesize_ctlr() argument
478 ret = cal_odt(priv->clk, in synthesize_ctlr()
479 &priv->opt, in synthesize_ctlr()
480 &priv->conf, in synthesize_ctlr()
481 &priv->dimm, in synthesize_ctlr()
482 priv->dimm_on_ctlr); in synthesize_ctlr()
[all …]
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| D | utility.c | 105 int disable_unused_ddrc(struct ddr_info *priv, in disable_unused_ddrc() argument
119 if (priv->num_ctlrs < 2) { in disable_unused_ddrc()
123 switch (priv->dimm_on_ctlr) { in disable_unused_ddrc()
133 ERROR("Invalid number of DIMMs %d\n", priv->dimm_on_ctlr); in disable_unused_ddrc()
143 priv->num_ctlrs = 1; in disable_unused_ddrc()
144 priv->spd_addr = &priv->spd_addr[priv->dimm_on_ctlr]; in disable_unused_ddrc()
145 priv->ddr[0] = priv->ddr[1]; in disable_unused_ddrc()
146 priv->ddr[1] = NULL; in disable_unused_ddrc()
147 priv->phy[0] = priv->phy[0]; in disable_unused_ddrc()
148 priv->phy[1] = NULL; in disable_unused_ddrc()
[all …]
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| /trusted-firmware-a-latest/drivers/nxp/ddr/fsl-mmdc/ |
| D | fsl_mmdc.c | 40 void mmdc_init(const struct fsl_mmdc_info *priv, uintptr_t nxp_ddr_addr) in mmdc_init() argument
49 ddr_out32(&mmdc->mdotc, priv->mdotc); in mmdc_init()
50 ddr_out32(&mmdc->mdcfg0, priv->mdcfg0); in mmdc_init()
51 ddr_out32(&mmdc->mdcfg1, priv->mdcfg1); in mmdc_init()
52 ddr_out32(&mmdc->mdcfg2, priv->mdcfg2); in mmdc_init()
55 ddr_out32(&mmdc->mdmisc, priv->mdmisc); in mmdc_init()
57 ddr_out32(&mmdc->mdrwd, priv->mdrwd); in mmdc_init()
58 ddr_out32(&mmdc->mpodtctrl, priv->mpodtctrl); in mmdc_init()
61 ddr_out32(&mmdc->mdor, priv->mdor); in mmdc_init()
65 tmp = priv->mdctl & ~(MDCTL_SDE0 | MDCTL_SDE1); in mmdc_init()
[all …]
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| /trusted-firmware-a-latest/plat/mediatek/include/lpm/ |
| D | mt_lp_rm.h | 47 int (*get_status)(unsigned int type, void *priv);
53 int stateid, void *priv);
60 int stateid, void *priv);
62 int stateid, void *priv);
65 extern int mt_lp_rm_get_status(unsigned int type, void *priv);
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| /trusted-firmware-a-latest/plat/nxp/soc-lx2160a/lx2160ardb/ |
| D | ddr_init.c | 58 unsigned long long board_static_ddr(struct ddr_info *priv) in board_static_ddr() argument
60 memcpy(&priv->ddr_reg, &static_1600, sizeof(static_1600)); in board_static_ddr()
61 memcpy(&priv->dimm, &static_dimm, sizeof(static_dimm)); in board_static_ddr()
62 priv->conf.cs_on_dimm[0] = 0x3; in board_static_ddr()
63 ddr_board_options(priv); in board_static_ddr()
64 compute_ddr_phy(priv); in board_static_ddr()
124 int ddr_board_options(struct ddr_info *priv) in ddr_board_options() argument
126 struct memctl_opt *popts = &priv->opt; in ddr_board_options()
127 const struct ddr_conf *conf = &priv->conf; in ddr_board_options()
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| /trusted-firmware-a-latest/plat/mediatek/drivers/spm/mt8188/constraints/ |
| D | mt_spm_rc_internal.h | 33 int spm_get_status_rc_cpu_buck_ldo(unsigned int type, void *priv);
41 int spm_get_status_rc_dram(unsigned int type, void *priv);
49 int spm_get_status_rc_syspll(unsigned int type, void *priv);
57 int spm_get_status_rc_bus26m(unsigned int type, void *priv);
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| /trusted-firmware-a-latest/include/drivers/nxp/ddr/ |
| D | ddr.h | 125 int disable_unused_ddrc(struct ddr_info *priv, int mask,
127 int ddr_board_options(struct ddr_info *priv);
134 int compute_ddr_phy(struct ddr_info *priv);
139 int cal_board_params(struct ddr_info *priv,
144 long long dram_init(struct ddr_info *priv
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| /trusted-firmware-a-latest/plat/mediatek/common/lpm/ |
| D | mt_lp_rm.c | 56 int mt_lp_rm_get_status(unsigned int type, void *priv) in mt_lp_rm_get_status() argument
70 res = (*con)->get_status(type, priv); in mt_lp_rm_get_status()
98 int stateid, void *priv) in mt_lp_rm_find_constraint() argument
111 res = rm->update(rm->consts, plat_mt_rm.count, stateid, priv); in mt_lp_rm_find_constraint()
130 int stateid, void *priv) in mt_lp_rm_find_and_run_constraint() argument
134 res = mt_lp_rm_find_constraint(idx, cpuid, stateid, priv); in mt_lp_rm_find_and_run_constraint()
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| /trusted-firmware-a-latest/plat/nxp/soc-ls1088a/ls1088aqds/ |
| D | ddr_init.c | 31 int ddr_board_options(struct ddr_info *priv) in ddr_board_options() argument
34 struct memctl_opt *popts = &priv->opt; in ddr_board_options()
41 ret = cal_board_params(priv, udimm, ARRAY_SIZE(udimm)); in ddr_board_options()
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| /trusted-firmware-a-latest/plat/nxp/soc-ls1043a/ls1043ardb/ |
| D | ddr_init.c | 53 uint64_t board_static_ddr(struct ddr_info *priv)
55 memcpy(&priv->ddr_reg, &static_1600, sizeof(static_1600));
70 int ddr_board_options(struct ddr_info *priv)
73 struct memctl_opt *popts = &priv->opt;
75 ret = cal_board_params(priv, ram, ARRAY_SIZE(ram));
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| /trusted-firmware-a-latest/plat/nxp/soc-ls1046a/ls1046aqds/ |
| D | ddr_init.c | 28 int ddr_board_options(struct ddr_info *priv) in ddr_board_options() argument
31 struct memctl_opt *popts = &priv->opt; in ddr_board_options()
38 ret = cal_board_params(priv, udimm, ARRAY_SIZE(udimm)); in ddr_board_options()
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| /trusted-firmware-a-latest/plat/nxp/soc-ls1088a/ls1088ardb/ |
| D | ddr_init.c | 32 int ddr_board_options(struct ddr_info *priv) in ddr_board_options() argument
35 struct memctl_opt *popts = &priv->opt; in ddr_board_options()
42 ret = cal_board_params(priv, udimm, ARRAY_SIZE(udimm)); in ddr_board_options()
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| /trusted-firmware-a-latest/plat/nxp/soc-ls1046a/ls1046afrwy/ |
| D | ddr_init.c | 54 long long board_static_ddr(struct ddr_info *priv) in board_static_ddr() argument
56 memcpy(&priv->ddr_reg, &static_1600, sizeof(static_1600)); in board_static_ddr()
71 int ddr_board_options(struct ddr_info *priv) in ddr_board_options() argument
74 struct memctl_opt *popts = &priv->opt; in ddr_board_options()
76 ret = cal_board_params(priv, ram, ARRAY_SIZE(ram)); in ddr_board_options()
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| /trusted-firmware-a-latest/plat/mediatek/mt8186/drivers/spm/ |
| D | mt_spm_cond.h | 49 void *priv; member
58 int stateid, void *priv);
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| /trusted-firmware-a-latest/plat/mediatek/mt8192/drivers/spm/ |
| D | mt_spm_cond.h | 47 void *priv; member
55 int stateid, void *priv);
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| /trusted-firmware-a-latest/plat/nxp/soc-lx2160a/lx2160aqds/ |
| D | ddr_init.c | 189 unsigned long long board_static_ddr(struct ddr_info *priv) in board_static_ddr() argument
191 (void)memcpy(&priv->ddr_reg, &static_2900, sizeof(static_2900)); in board_static_ddr()
192 (void)memcpy(&priv->dimm, &static_dimm, sizeof(static_dimm)); in board_static_ddr()
193 priv->conf.cs_on_dimm[0] = 0x3; in board_static_ddr()
194 ddr_board_options(priv); in board_static_ddr()
195 compute_ddr_phy(priv); in board_static_ddr()
255 int ddr_board_options(struct ddr_info *priv) in ddr_board_options() argument
257 struct memctl_opt *popts = &priv->opt; in ddr_board_options()
258 const struct ddr_conf *conf = &priv->conf; in ddr_board_options()
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| /trusted-firmware-a-latest/plat/nxp/soc-lx2160a/lx2162aqds/ |
| D | ddr_init.c | 189 unsigned long long board_static_ddr(struct ddr_info *priv) in board_static_ddr() argument
191 memcpy(&priv->ddr_reg, &static_2900, sizeof(static_2900)); in board_static_ddr()
192 memcpy(&priv->dimm, &static_dimm, sizeof(static_dimm)); in board_static_ddr()
193 priv->conf.cs_on_dimm[0] = 0x3; in board_static_ddr()
194 ddr_board_options(priv); in board_static_ddr()
195 compute_ddr_phy(priv); in board_static_ddr()
254 int ddr_board_options(struct ddr_info *priv) in ddr_board_options() argument
256 struct memctl_opt *popts = &priv->opt; in ddr_board_options()
257 const struct ddr_conf *conf = &priv->conf; in ddr_board_options()
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