59 struct clk_oscillator_data *clk_oscillator_get_data(struct stm32_clk_priv *priv, int id)  in clk_oscillator_get_data()  argument
61 	const struct clk_stm32 *clk = _clk_get(priv, id);  in clk_oscillator_get_data()
65 	return &priv->osci_data[osc_id];  in clk_oscillator_get_data()
68 void clk_oscillator_set_bypass(struct stm32_clk_priv *priv, int id, bool digbyp, bool bypass)  in clk_oscillator_set_bypass()  argument
70 	struct clk_oscillator_data *osc_data = clk_oscillator_get_data(priv, id);  in clk_oscillator_set_bypass()
79 	address = priv->base + bypass_data->offset;  in clk_oscillator_set_bypass()
90 void clk_oscillator_set_css(struct stm32_clk_priv *priv, int id, bool css)  in clk_oscillator_set_css()  argument
92 	struct clk_oscillator_data *osc_data = clk_oscillator_get_data(priv, id);  in clk_oscillator_set_css()
101 	address = priv->base + css_data->offset;  in clk_oscillator_set_css()
108 void clk_oscillator_set_drive(struct stm32_clk_priv *priv, int id, uint8_t lsedrv)  in clk_oscillator_set_drive()  argument
110 	struct clk_oscillator_data *osc_data = clk_oscillator_get_data(priv, id);  in clk_oscillator_set_drive()
121 	address = priv->base + drive_data->offset;  in clk_oscillator_set_drive()
142 int clk_oscillator_wait_ready(struct stm32_clk_priv *priv, int id, bool ready_on)  in clk_oscillator_wait_ready()  argument
144 	struct clk_oscillator_data *osc_data = clk_oscillator_get_data(priv, id);  in clk_oscillator_wait_ready()
146 	return _clk_stm32_gate_wait_ready(priv, osc_data->gate_rdy_id, ready_on);  in clk_oscillator_wait_ready()
149 int clk_oscillator_wait_ready_on(struct stm32_clk_priv *priv, int id)  in clk_oscillator_wait_ready_on()  argument
151 	return clk_oscillator_wait_ready(priv, id, true);  in clk_oscillator_wait_ready_on()
154 int clk_oscillator_wait_ready_off(struct stm32_clk_priv *priv, int id)  in clk_oscillator_wait_ready_off()  argument
156 	return clk_oscillator_wait_ready(priv, id, false);  in clk_oscillator_wait_ready_off()
159 static int clk_gate_enable(struct stm32_clk_priv *priv, int id)  in clk_gate_enable()  argument
161 	const struct clk_stm32 *clk = _clk_get(priv, id);  in clk_gate_enable()
164 	mmio_setbits_32(priv->base + cfg->offset, BIT(cfg->bit_idx));  in clk_gate_enable()
169 static void clk_gate_disable(struct stm32_clk_priv *priv, int id)  in clk_gate_disable()  argument
171 	const struct clk_stm32 *clk = _clk_get(priv, id);  in clk_gate_disable()
174 	mmio_clrbits_32(priv->base + cfg->offset, BIT(cfg->bit_idx));  in clk_gate_disable()
177 static bool clk_gate_is_enabled(struct stm32_clk_priv *priv, int id)  in clk_gate_is_enabled()  argument
179 	const struct clk_stm32 *clk = _clk_get(priv, id);  in clk_gate_is_enabled()
182 	return ((mmio_read_32(priv->base + cfg->offset) & BIT(cfg->bit_idx)) != 0U);  in clk_gate_is_enabled()
191 void _clk_stm32_gate_disable(struct stm32_clk_priv *priv, uint16_t gate_id)  in _clk_stm32_gate_disable()  argument
193 	const struct gate_cfg *gate = &priv->gates[gate_id];  in _clk_stm32_gate_disable()
194 	uintptr_t addr = priv->base + gate->offset;  in _clk_stm32_gate_disable()
203 int _clk_stm32_gate_enable(struct stm32_clk_priv *priv, uint16_t gate_id)  in _clk_stm32_gate_enable()  argument
205 	const struct gate_cfg *gate = &priv->gates[gate_id];  in _clk_stm32_gate_enable()
206 	uintptr_t addr = priv->base + gate->offset;  in _clk_stm32_gate_enable()
218 const struct clk_stm32 *_clk_get(struct stm32_clk_priv *priv, int id)  in _clk_get()  argument
220 	if ((unsigned int)id < priv->num) {  in _clk_get()
221 		return &priv->clks[id];  in _clk_get()
269 int clk_mux_set_parent(struct stm32_clk_priv *priv, uint16_t pid, uint8_t sel)  in clk_mux_set_parent()  argument
271 	const struct parent_cfg *parents = &priv->parents[pid & MUX_PARENT_MASK];  in clk_mux_set_parent()
273 	uintptr_t address = priv->base + mux->offset;  in clk_mux_set_parent()
298 int _clk_stm32_set_parent(struct stm32_clk_priv *priv, int clk, int clkp)  in _clk_stm32_set_parent()  argument
305 	pid = priv->clks[clk].parent;  in _clk_stm32_set_parent()
311 	old_parent = _clk_stm32_get_parent(priv, clk);  in _clk_stm32_set_parent()
319 	parents = &priv->parents[pid & MUX_PARENT_MASK];  in _clk_stm32_set_parent()
323 			bool clk_was_enabled = _clk_stm32_is_enabled(priv, clk);  in _clk_stm32_set_parent()
327 			_clk_stm32_enable(priv, clkp);  in _clk_stm32_set_parent()
328 			_clk_stm32_enable(priv, old_parent);  in _clk_stm32_set_parent()
330 			err = clk_mux_set_parent(priv, pid, sel);  in _clk_stm32_set_parent()
332 			_clk_stm32_disable(priv, old_parent);  in _clk_stm32_set_parent()
335 				_clk_stm32_disable(priv, old_parent);  in _clk_stm32_set_parent()
337 				_clk_stm32_disable(priv, clkp);  in _clk_stm32_set_parent()
347 int clk_mux_get_parent(struct stm32_clk_priv *priv, uint32_t mux_id)  in clk_mux_get_parent()  argument
353 	if (mux_id >= priv->nb_parents) {  in clk_mux_get_parent()
357 	parent = &priv->parents[mux_id];  in clk_mux_get_parent()
362 	return (mmio_read_32(priv->base + mux->offset) & mask) >> mux->shift;  in clk_mux_get_parent()
365 int _clk_stm32_set_parent_by_index(struct stm32_clk_priv *priv, int clk, int sel)  in _clk_stm32_set_parent_by_index()  argument
369 	pid = priv->clks[clk].parent;  in _clk_stm32_set_parent_by_index()
375 	return clk_mux_set_parent(priv, pid, sel);  in _clk_stm32_set_parent_by_index()
378 int _clk_stm32_get_parent(struct stm32_clk_priv *priv, int clk_id)  in _clk_stm32_get_parent()  argument
380 	const struct clk_stm32 *clk = _clk_get(priv, clk_id);  in _clk_stm32_get_parent()
385 	mux_id = priv->clks[clk_id].parent;  in _clk_stm32_get_parent()
395 	parent = &priv->parents[mux_id];  in _clk_stm32_get_parent()
398 		sel = clk->ops->get_parent(priv, clk_id);  in _clk_stm32_get_parent()
400 		sel = clk_mux_get_parent(priv, mux_id);  in _clk_stm32_get_parent()
410 int _clk_stm32_get_parent_index(struct stm32_clk_priv *priv, int clk_id)  in _clk_stm32_get_parent_index()  argument
414 	mux_id = priv->clks[clk_id].parent;  in _clk_stm32_get_parent_index()
425 	return clk_mux_get_parent(priv, mux_id);  in _clk_stm32_get_parent_index()
428 int _clk_stm32_get_parent_by_index(struct stm32_clk_priv *priv, int clk_id, int idx)  in _clk_stm32_get_parent_by_index()  argument
433 	mux_id = priv->clks[clk_id].parent;  in _clk_stm32_get_parent_by_index()
443 	parent = &priv->parents[mux_id];  in _clk_stm32_get_parent_by_index()
452 int clk_get_index(struct stm32_clk_priv *priv, unsigned long binding_id)  in clk_get_index()  argument
456 	for (i = 0U; i < priv->num; i++) {  in clk_get_index()
457 		if (binding_id == priv->clks[i].binding) {  in clk_get_index()
465 unsigned long _clk_stm32_get_rate(struct stm32_clk_priv *priv, int id)  in _clk_stm32_get_rate()  argument
467 	const struct clk_stm32 *clk = _clk_get(priv, id);  in _clk_stm32_get_rate()
470 	if ((unsigned int)id >= priv->num) {  in _clk_stm32_get_rate()
474 	parent = _clk_stm32_get_parent(priv, id);  in _clk_stm32_get_rate()
483 			prate = _clk_stm32_get_rate(priv, parent);  in _clk_stm32_get_rate()
486 		return clk->ops->recalc_rate(priv, id, prate);  in _clk_stm32_get_rate()
493 	return _clk_stm32_get_rate(priv, parent);  in _clk_stm32_get_rate()
496 unsigned long _clk_stm32_get_parent_rate(struct stm32_clk_priv *priv, int id)  in _clk_stm32_get_parent_rate()  argument
498 	int parent_id = _clk_stm32_get_parent(priv, id);  in _clk_stm32_get_parent_rate()
504 	return _clk_stm32_get_rate(priv, parent_id);  in _clk_stm32_get_parent_rate()
507 static uint8_t _stm32_clk_get_flags(struct stm32_clk_priv *priv, int id)  in _stm32_clk_get_flags()  argument
509 	return priv->clks[id].flags;  in _stm32_clk_get_flags()
512 bool _stm32_clk_is_flags(struct stm32_clk_priv *priv, int id, uint8_t flag)  in _stm32_clk_is_flags()  argument
514 	if ((_stm32_clk_get_flags(priv, id) & flag) != 0U) {  in _stm32_clk_is_flags()
521 int clk_stm32_enable_call_ops(struct stm32_clk_priv *priv, uint16_t id)  in clk_stm32_enable_call_ops()  argument
523 	const struct clk_stm32 *clk = _clk_get(priv, id);  in clk_stm32_enable_call_ops()
526 		clk->ops->enable(priv, id);  in clk_stm32_enable_call_ops()
532 static int _clk_stm32_enable_core(struct stm32_clk_priv *priv, int id)  in _clk_stm32_enable_core()  argument
537 	if (priv->gate_refcounts[id] == 0U) {  in _clk_stm32_enable_core()
538 		parent = _clk_stm32_get_parent(priv, id);  in _clk_stm32_enable_core()
543 			ret = _clk_stm32_enable_core(priv, parent);  in _clk_stm32_enable_core()
548 		clk_stm32_enable_call_ops(priv, id);  in _clk_stm32_enable_core()
551 	priv->gate_refcounts[id]++;  in _clk_stm32_enable_core()
553 	if (priv->gate_refcounts[id] == UINT_MAX) {  in _clk_stm32_enable_core()
561 int _clk_stm32_enable(struct stm32_clk_priv *priv, int id)  in _clk_stm32_enable()  argument
566 	ret = _clk_stm32_enable_core(priv, id);  in _clk_stm32_enable()
572 void clk_stm32_disable_call_ops(struct stm32_clk_priv *priv, uint16_t id)  in clk_stm32_disable_call_ops()  argument
574 	const struct clk_stm32 *clk = _clk_get(priv, id);  in clk_stm32_disable_call_ops()
577 		clk->ops->disable(priv, id);  in clk_stm32_disable_call_ops()
581 static void _clk_stm32_disable_core(struct stm32_clk_priv *priv, int id)  in _clk_stm32_disable_core()  argument
585 	if ((priv->gate_refcounts[id] == 1U) && _stm32_clk_is_flags(priv, id, CLK_IS_CRITICAL)) {  in _clk_stm32_disable_core()
589 	if (priv->gate_refcounts[id] == 0U) {  in _clk_stm32_disable_core()
591 		if (_clk_stm32_is_enabled(priv, id)) {  in _clk_stm32_disable_core()
592 			clk_stm32_disable_call_ops(priv, id);  in _clk_stm32_disable_core()
599 	if (--priv->gate_refcounts[id] > 0U) {  in _clk_stm32_disable_core()
603 	clk_stm32_disable_call_ops(priv, id);  in _clk_stm32_disable_core()
605 	parent = _clk_stm32_get_parent(priv, id);  in _clk_stm32_disable_core()
607 		_clk_stm32_disable_core(priv, parent);  in _clk_stm32_disable_core()
611 void _clk_stm32_disable(struct stm32_clk_priv *priv, int id)  in _clk_stm32_disable()  argument
615 	_clk_stm32_disable_core(priv, id);  in _clk_stm32_disable()
620 bool _clk_stm32_is_enabled(struct stm32_clk_priv *priv, int id)  in _clk_stm32_is_enabled()  argument
622 	const struct clk_stm32 *clk = _clk_get(priv, id);  in _clk_stm32_is_enabled()
625 		return clk->ops->is_enabled(priv, id);  in _clk_stm32_is_enabled()
628 	return priv->gate_refcounts[id];  in _clk_stm32_is_enabled()
633 	struct stm32_clk_priv *priv = clk_stm32_get_priv();  in clk_stm32_enable()  local
636 	id = clk_get_index(priv, binding_id);  in clk_stm32_enable()
641 	return _clk_stm32_enable(priv, id);  in clk_stm32_enable()
646 	struct stm32_clk_priv *priv = clk_stm32_get_priv();  in clk_stm32_disable()  local
649 	id = clk_get_index(priv, binding_id);  in clk_stm32_disable()
651 		_clk_stm32_disable(priv, id);  in clk_stm32_disable()
657 	struct stm32_clk_priv *priv = clk_stm32_get_priv();  in clk_stm32_is_enabled()  local
660 	id = clk_get_index(priv, binding_id);  in clk_stm32_is_enabled()
665 	return _clk_stm32_is_enabled(priv, id);  in clk_stm32_is_enabled()
670 	struct stm32_clk_priv *priv = clk_stm32_get_priv();  in clk_stm32_get_rate()  local
673 	id = clk_get_index(priv, binding_id);  in clk_stm32_get_rate()
678 	return _clk_stm32_get_rate(priv, id);  in clk_stm32_get_rate()
683 	struct stm32_clk_priv *priv = clk_stm32_get_priv();  in clk_stm32_get_parent()  local
686 	id = clk_get_index(priv, binding_id);  in clk_stm32_get_parent()
691 	return _clk_stm32_get_parent(priv, id);  in clk_stm32_get_parent()
704 	struct stm32_clk_priv *priv = clk_stm32_get_priv();  in clk_stm32_enable_critical_clocks()  local
707 	for (i = 0U; i < priv->num; i++) {  in clk_stm32_enable_critical_clocks()
708 		if (_stm32_clk_is_flags(priv, i, CLK_IS_CRITICAL)) {  in clk_stm32_enable_critical_clocks()
709 			_clk_stm32_enable(priv, i);  in clk_stm32_enable_critical_clocks()
719 uint32_t clk_stm32_div_get_value(struct stm32_clk_priv *priv, int div_id)  in clk_stm32_div_get_value()  argument
721 	const struct div_cfg *divider = &priv->div[div_id];  in clk_stm32_div_get_value()
724 	val = mmio_read_32(priv->base + divider->offset) >> divider->shift;  in clk_stm32_div_get_value()
730 unsigned long _clk_stm32_divider_recalc(struct stm32_clk_priv *priv,  in _clk_stm32_divider_recalc()  argument
734 	const struct div_cfg *divider = &priv->div[div_id];  in _clk_stm32_divider_recalc()
735 	uint32_t val = clk_stm32_div_get_value(priv, div_id);  in _clk_stm32_divider_recalc()
746 unsigned long clk_stm32_divider_recalc(struct stm32_clk_priv *priv, int id,  in clk_stm32_divider_recalc()  argument
749 	const struct clk_stm32 *clk = _clk_get(priv, id);  in clk_stm32_divider_recalc()
752 	return _clk_stm32_divider_recalc(priv, div_cfg->id, prate);  in clk_stm32_divider_recalc()
759 int clk_stm32_set_div(struct stm32_clk_priv *priv, uint32_t div_id, uint32_t value)  in clk_stm32_set_div()  argument
766 	if (div_id >= priv->nb_div) {  in clk_stm32_set_div()
770 	divider = &priv->div[div_id];  in clk_stm32_set_div()
771 	address = priv->base + divider->offset;  in clk_stm32_set_div()
792 int _clk_stm32_gate_wait_ready(struct stm32_clk_priv *priv, uint16_t gate_id,  in _clk_stm32_gate_wait_ready()  argument
795 	const struct gate_cfg *gate = &priv->gates[gate_id];  in _clk_stm32_gate_wait_ready()
796 	uintptr_t address = priv->base + gate->offset;  in _clk_stm32_gate_wait_ready()
822 int clk_stm32_gate_enable(struct stm32_clk_priv *priv, int id)  in clk_stm32_gate_enable()  argument
824 	const struct clk_stm32 *clk = _clk_get(priv, id);  in clk_stm32_gate_enable()
826 	const struct gate_cfg *gate = &priv->gates[cfg->id];  in clk_stm32_gate_enable()
827 	uintptr_t addr = priv->base + gate->offset;  in clk_stm32_gate_enable()
839 void clk_stm32_gate_disable(struct stm32_clk_priv *priv, int id)  in clk_stm32_gate_disable()  argument
841 	const struct clk_stm32 *clk = _clk_get(priv, id);  in clk_stm32_gate_disable()
843 	const struct gate_cfg *gate = &priv->gates[cfg->id];  in clk_stm32_gate_disable()
844 	uintptr_t addr = priv->base + gate->offset;  in clk_stm32_gate_disable()
853 bool _clk_stm32_gate_is_enabled(struct stm32_clk_priv *priv, int gate_id)  in _clk_stm32_gate_is_enabled()  argument
858 	gate = &priv->gates[gate_id];  in _clk_stm32_gate_is_enabled()
859 	addr = priv->base + gate->offset;  in _clk_stm32_gate_is_enabled()
864 bool clk_stm32_gate_is_enabled(struct stm32_clk_priv *priv, int id)  in clk_stm32_gate_is_enabled()  argument
866 	const struct clk_stm32 *clk = _clk_get(priv, id);  in clk_stm32_gate_is_enabled()
869 	return _clk_stm32_gate_is_enabled(priv, cfg->id);  in clk_stm32_gate_is_enabled()
882 unsigned long fixed_factor_recalc_rate(struct stm32_clk_priv *priv,  in fixed_factor_recalc_rate()  argument
885 	const struct clk_stm32 *clk = _clk_get(priv, id);  in fixed_factor_recalc_rate()
902 static unsigned long timer_recalc_rate(struct stm32_clk_priv *priv,  in timer_recalc_rate()  argument
905 	const struct clk_stm32 *clk = _clk_get(priv, id);  in timer_recalc_rate()
908 	uintptr_t rcc_base = priv->base;  in timer_recalc_rate()
927 static unsigned long clk_fixed_rate_recalc(struct stm32_clk_priv *priv, int id,  in clk_fixed_rate_recalc()  argument
930 	const struct clk_stm32 *clk = _clk_get(priv, id);  in clk_fixed_rate_recalc()
940 static unsigned long clk_stm32_osc_recalc_rate(struct stm32_clk_priv *priv,  in clk_stm32_osc_recalc_rate()  argument
943 	struct clk_oscillator_data *osc_data = clk_oscillator_get_data(priv, id);  in clk_stm32_osc_recalc_rate()
948 bool clk_stm32_osc_gate_is_enabled(struct stm32_clk_priv *priv, int id)  in clk_stm32_osc_gate_is_enabled()  argument
950 	struct clk_oscillator_data *osc_data = clk_oscillator_get_data(priv, id);  in clk_stm32_osc_gate_is_enabled()
952 	return _clk_stm32_gate_is_enabled(priv, osc_data->gate_id);  in clk_stm32_osc_gate_is_enabled()
956 int clk_stm32_osc_gate_enable(struct stm32_clk_priv *priv, int id)  in clk_stm32_osc_gate_enable()  argument
958 	struct clk_oscillator_data *osc_data = clk_oscillator_get_data(priv, id);  in clk_stm32_osc_gate_enable()
960 	_clk_stm32_gate_enable(priv, osc_data->gate_id);  in clk_stm32_osc_gate_enable()
962 	if (_clk_stm32_gate_wait_ready(priv, osc_data->gate_rdy_id, true) != 0U) {  in clk_stm32_osc_gate_enable()
970 void clk_stm32_osc_gate_disable(struct stm32_clk_priv *priv, int id)  in clk_stm32_osc_gate_disable()  argument
972 	struct clk_oscillator_data *osc_data = clk_oscillator_get_data(priv, id);  in clk_stm32_osc_gate_disable()
974 	_clk_stm32_gate_disable(priv, osc_data->gate_id);  in clk_stm32_osc_gate_disable()
976 	if (_clk_stm32_gate_wait_ready(priv, osc_data->gate_rdy_id, false) != 0U) {  in clk_stm32_osc_gate_disable()
1023 void clk_stm32_osc_init(struct stm32_clk_priv *priv, int id)  in clk_stm32_osc_init()  argument
1025 	struct clk_oscillator_data *osc_data = clk_oscillator_get_data(priv, id);  in clk_stm32_osc_init()
1067 int clk_stm32_init(struct stm32_clk_priv *priv, uintptr_t base)  in clk_stm32_init()  argument
1071 	stm32_clock_data = priv;  in clk_stm32_init()
1073 	priv->base = base;  in clk_stm32_init()
1075 	for (i = 0U; i < priv->num; i++) {  in clk_stm32_init()
1076 		const struct clk_stm32 *clk = _clk_get(priv, i);  in clk_stm32_init()
1081 			clk->ops->init(priv, i);  in clk_stm32_init()