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Searched refs:SR3 (Results 1 – 25 of 64) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wb0x/drivers/include/
Dstm32wb0x_hal_pwr.h295 …((__FLAG__) == PWR_FLAG_WUF12) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF12) == PWR_SR3_WUF12) …
296 …((__FLAG__) == PWR_FLAG_WUF13) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF13) == PWR_SR3_WUF13) …
297 …((__FLAG__) == PWR_FLAG_WUF14) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF14) == PWR_SR3_WUF14) …
298 …((__FLAG__) == PWR_FLAG_WUF15) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF15) == PWR_SR3_WUF15) …
299 …((__FLAG__) == PWR_FLAG_WUF16) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF16) == PWR_SR3_WUF16) …
300 …((__FLAG__) == PWR_FLAG_WUF17) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF17) == PWR_SR3_WUF17) …
301 …((__FLAG__) == PWR_FLAG_WUF18) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF18) == PWR_SR3_WUF18) …
302 …((__FLAG__) == PWR_FLAG_WUF19) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF19) == PWR_SR3_WUF19) …
303 …((__FLAG__) == PWR_FLAG_WUF20) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF20) == PWR_SR3_WUF20) …
304 …((__FLAG__) == PWR_FLAG_WUF21) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF21) == PWR_SR3_WUF21) …
[all …]
Dstm32wb0x_ll_pwr.h1524 return ((READ_BIT(PWR->SR3, PWR_SR3_WUF12) == (PWR_SR3_WUF12)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_WU12()
1534 return ((READ_BIT(PWR->SR3, PWR_SR3_WUF13) == (PWR_SR3_WUF13)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_WU13()
1544 return ((READ_BIT(PWR->SR3, PWR_SR3_WUF14) == (PWR_SR3_WUF14)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_WU14()
1554 return ((READ_BIT(PWR->SR3, PWR_SR3_WUF15) == (PWR_SR3_WUF15)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_WU15()
1564 return ((READ_BIT(PWR->SR3, PWR_SR3_WUF16) == (PWR_SR3_WUF16)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_WU16()
1574 return ((READ_BIT(PWR->SR3, PWR_SR3_WUF17) == (PWR_SR3_WUF17)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_WU17()
1584 return ((READ_BIT(PWR->SR3, PWR_SR3_WUF18) == (PWR_SR3_WUF18)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_WU18()
1594 return ((READ_BIT(PWR->SR3, PWR_SR3_WUF19) == (PWR_SR3_WUF19)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_WU19()
1605 return ((READ_BIT(PWR->SR3, PWR_SR3_WUF20) == (PWR_SR3_WUF20)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_WU20()
1617 return ((READ_BIT(PWR->SR3, PWR_SR3_WUF21) == (PWR_SR3_WUF21)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_WU21()
[all …]
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_fsmc.h673 … ((__INSTANCE__)->SR3 |= (__INTERRUPT__)))
688 … ((__INSTANCE__)->SR3 &= ~(__INTERRUPT__)))
704 … (((__INSTANCE__)->SR3 &(__FLAG__)) == (__FLAG__)))
720 … ((__INSTANCE__)->SR3 &= ~(__FLAG__)))
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_fsmc.h736 … ((__INSTANCE__)->SR3 |= (__INTERRUPT__)))
751 … ((__INSTANCE__)->SR3 &= ~(__INTERRUPT__)))
767 … (((__INSTANCE__)->SR3 &(__FLAG__)) == (__FLAG__)))
783 … ((__INSTANCE__)->SR3 &= ~(__FLAG__)))
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_fmc.h716 … ((__INSTANCE__)->SR3 |= (__INTERRUPT__)))
730 … ((__INSTANCE__)->SR3 &= ~(__INTERRUPT__)))
745 … (((__INSTANCE__)->SR3 &(__FLAG__)) == (__FLAG__)))
760 … ((__INSTANCE__)->SR3 &= ~(__FLAG__)))
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_fsmc.h856 … ((__INSTANCE__)->SR3 |= (__INTERRUPT__)))
870 … ((__INSTANCE__)->SR3 &= ~(__INTERRUPT__)))
885 … (((__INSTANCE__)->SR3 &(__FLAG__)) == (__FLAG__)))
900 … ((__INSTANCE__)->SR3 &= ~(__FLAG__)))
Dstm32f4xx_ll_fmc.h1086 … ((__INSTANCE__)->SR3 |= (__INTERRUPT__)))
1104 … ((__INSTANCE__)->SR3 &= ~(__INTERRUPT__)))
1123 … (((__INSTANCE__)->SR3 &(__FLAG__)) == (__FLAG__)))
1142 … ((__INSTANCE__)->SR3 &= ~(__FLAG__)))
/hal_stm32-latest/stm32cube/stm32wb0x/drivers/src/
Dstm32wb0x_ll_pwr.c126 LL_PWR_WriteReg(SR3, in LL_PWR_DeInit()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_gtzc.c1283 reg_value = READ_REG(GTZC_TZIC->SR3); in HAL_GTZC_TZIC_GetFlag()
1427 sr_flags = READ_REG(GTZC_TZIC_S->SR3); in HAL_GTZC_IRQHandler()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_hal_gtzc.c1320 reg_value = READ_REG(GTZC_TZIC->SR3); in HAL_GTZC_TZIC_GetFlag()
1450 sr_flags = READ_REG(GTZC_TZIC->SR3); in HAL_GTZC_IRQHandler()
/hal_stm32-latest/stm32cube/stm32wb0x/soc/
Dsystem_stm32wb0x.c204 if ((RCC->CSR == 0) && ((PWR->SR1 != 0)||(PWR->SR3 != 0))) { in SystemInit()
Dstm32wb05.h381 …__IO uint32_t SR3; /*!< (@ 0x00000038) Power status register 3 … member
Dstm32wb07.h386 …__IO uint32_t SR3; /*!< (@ 0x00000038) Power status register 3 … member
Dstm32wb09.h375 __IO uint32_t SR3; /*!< (@ 0x00000038) SR3 register */ member
Dstm32wb06.h386 …__IO uint32_t SR3; /*!< (@ 0x00000038) Power status register 3 … member
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_gtzc.c1635 reg_value = READ_REG(GTZC_TZIC1->SR3); in HAL_GTZC_TZIC_GetFlag()
1775 sr_flags = READ_REG(GTZC_TZIC1_S->SR3); in HAL_GTZC_IRQHandler()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_gtzc.c1919 reg_value = READ_REG(GTZC_TZIC1->SR3); in HAL_GTZC_TZIC_GetFlag()
2077 sr_flags = READ_REG(GTZC_TZIC1_S->SR3); in HAL_GTZC_IRQHandler()
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/src/
Dstm32f2xx_ll_fsmc.c646 WRITE_REG(Device->SR3, 0x00000040U); in FSMC_NAND_DeInit()
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/src/
Dstm32f3xx_ll_fmc.c669 WRITE_REG(Device->SR3, 0x00000040U); in FMC_NAND_DeInit()
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/src/
Dstm32f1xx_ll_fsmc.c678 WRITE_REG(Device->SR3, 0x00000040U); in FSMC_NAND_DeInit()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_ll_fsmc.c727 WRITE_REG(Device->SR3, 0x00000040U); in FSMC_NAND_DeInit()
Dstm32f4xx_ll_fmc.c780 WRITE_REG(Device->SR3, 0x00000040U); in FMC_NAND_DeInit()
/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f101xg.h390 …__IO uint32_t SR3; /*!< NAND Flash FIFO status and interrupt register 3, Address offset… member
Dstm32f101xe.h378 …__IO uint32_t SR3; /*!< NAND Flash FIFO status and interrupt register 3, Address offset… member
Dstm32f103xe.h456 …__IO uint32_t SR3; /*!< NAND Flash FIFO status and interrupt register 3, Address offset… member

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