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Searched refs:RCC_CFGR_PPRE (Results 1 – 25 of 44) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/drivers/src/
Dstm32f0xx_hal_rcc.c228 CLEAR_BIT(RCC->CFGR, RCC_CFGR_SW | RCC_CFGR_HPRE | RCC_CFGR_PPRE | RCC_CFGR_MCO); in HAL_RCC_DeInit()
816 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_HCLK_DIV16); in HAL_RCC_ClockConfig()
899 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider); in HAL_RCC_ClockConfig()
1187 …return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE) >> RCC_CFGR_PPRE_BITNUM… in HAL_RCC_GetPCLK1Freq()
1315 RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE); in HAL_RCC_GetClockConfig()
Dstm32f0xx_ll_rcc.c126 CLEAR_BIT(vl_mask, (RCC_CFGR_SW | RCC_CFGR_HPRE | RCC_CFGR_PPRE | RCC_CFGR_MCOSEL)); in LL_RCC_DeInit()
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/src/
Dstm32c0xx_hal_rcc.c680 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_HCLK_DIV16); in HAL_RCC_ClockConfig()
782 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider); in HAL_RCC_ClockConfig()
1006 …return (HAL_RCC_GetHCLKFreq() >> ((APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE) >> RCC_CFGR_PPRE_Pos]… in HAL_RCC_GetPCLK1Freq()
1097 RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/src/
Dstm32g0xx_hal_rcc.c849 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_HCLK_DIV16); in HAL_RCC_ClockConfig()
944 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider); in HAL_RCC_ClockConfig()
1339 RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/
Dstm32u0xx_hal_rcc.c1015 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider); in HAL_RCC_ClockConfig()
1316 …return (HAL_RCC_GetHCLKFreq() >> (APBPrescTable[READ_BIT(RCC->CFGR, RCC_CFGR_PPRE) >> RCC_CFGR_PPR… in HAL_RCC_GetPCLK1Freq()
1481 RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE); in HAL_RCC_GetClockConfig()
Dstm32u0xx_hal_rcc_ex.c929 if ((READ_BIT(RCC->CFGR, RCC_CFGR_PPRE) == RCC_HCLK_DIV1)) in HAL_RCCEx_GetPeriphCLKFreq()
955 if ((READ_BIT(RCC->CFGR, RCC_CFGR_PPRE) == RCC_HCLK_DIV1)) in HAL_RCCEx_GetPeriphCLKFreq()
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_rcc.h1192 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, Prescaler); in LL_RCC_SetAPB1Prescaler()
1286 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE)); in LL_RCC_GetAPB1Prescaler()
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_rcc.h1152 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, Prescaler); in LL_RCC_SetAPB1Prescaler()
1186 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE)); in LL_RCC_GetAPB1Prescaler()
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_ll_rcc.h1725 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, Prescaler); in LL_RCC_SetAPB1Prescaler()
1759 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE)); in LL_RCC_GetAPB1Prescaler()
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_rcc.h1741 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, Prescaler); in LL_RCC_SetAPB1Prescaler()
1795 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE)); in LL_RCC_GetAPB1Prescaler()
/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h2828 #define RCC_CFGR_PPRE RCC_CFGR_PPRE_Msk /*!< PRE[2:0] bits (… macro
Dstm32f030x8.h2858 #define RCC_CFGR_PPRE RCC_CFGR_PPRE_Msk /*!< PRE[2:0] bits (… macro
Dstm32f070x6.h2882 #define RCC_CFGR_PPRE RCC_CFGR_PPRE_Msk /*!< PRE[2:0] bits (… macro
Dstm32f031x6.h2954 #define RCC_CFGR_PPRE RCC_CFGR_PPRE_Msk /*!< PRE[2:0] bits (… macro
Dstm32f030xc.h3122 #define RCC_CFGR_PPRE RCC_CFGR_PPRE_Msk /*!< PRE[2:0] bits (… macro
Dstm32f038xx.h2929 #define RCC_CFGR_PPRE RCC_CFGR_PPRE_Msk /*!< PRE[2:0] bits (… macro
Dstm32f070xb.h2974 #define RCC_CFGR_PPRE RCC_CFGR_PPRE_Msk /*!< PRE[2:0] bits (… macro
Dstm32f058xx.h3378 #define RCC_CFGR_PPRE RCC_CFGR_PPRE_Msk /*!< PRE[2:0] bits (… macro
Dstm32f051x8.h3403 #define RCC_CFGR_PPRE RCC_CFGR_PPRE_Msk /*!< PRE[2:0] bits (… macro
Dstm32f071xb.h3797 #define RCC_CFGR_PPRE RCC_CFGR_PPRE_Msk /*!< PRE[2:0] bits (… macro
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h3900 #define RCC_CFGR_PPRE RCC_CFGR_PPRE_Msk /*!< PRE1[2:0] bits … macro
Dstm32c031xx.h4054 #define RCC_CFGR_PPRE RCC_CFGR_PPRE_Msk /*!< PRE1[2:0] bits … macro
Dstm32c071xx.h4465 #define RCC_CFGR_PPRE RCC_CFGR_PPRE_Msk /*!< PRE1[2:0] bits … macro
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h4066 #define RCC_CFGR_PPRE RCC_CFGR_PPRE_Msk /*!< PRE1[2:0] bits … macro
Dstm32g050xx.h4085 #define RCC_CFGR_PPRE RCC_CFGR_PPRE_Msk /*!< PRE1[2:0] bits … macro

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