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Searched refs:RCC_APBSMENR2_SPI1SMEN (Results 1 – 21 of 21) sorted by relevance

/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_hal_rcc.h1373 #define __HAL_RCC_SPI1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_SPI1SMEN)
1382 #define __HAL_RCC_SPI1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_SPI1SMEN)
1509 …_RCC_SPI1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_SPI1SMEN) != RESE…
1518 …_RCC_SPI1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_SPI1SMEN) == RESE…
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h2152 #define __HAL_RCC_SPI1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_SPI1SMEN)
2164 #define __HAL_RCC_SPI1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_SPI1SMEN)
2420 …_RCC_SPI1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_SPI1SMEN) != RESE…
2433 …_RCC_SPI1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_SPI1SMEN) == RESE…
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_hal_rcc.h1980 #define __HAL_RCC_SPI1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_SPI1SMEN)
1990 #define __HAL_RCC_SPI1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_SPI1SMEN)
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h4193 #define RCC_APBSMENR2_SPI1SMEN RCC_APBSMENR2_SPI1SMEN_Msk macro
Dstm32c031xx.h4356 #define RCC_APBSMENR2_SPI1SMEN RCC_APBSMENR2_SPI1SMEN_Msk macro
Dstm32c071xx.h4839 #define RCC_APBSMENR2_SPI1SMEN RCC_APBSMENR2_SPI1SMEN_Msk macro
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h4438 #define RCC_APBSMENR2_SPI1SMEN RCC_APBSMENR2_SPI1SMEN_Msk macro
Dstm32g050xx.h4481 #define RCC_APBSMENR2_SPI1SMEN RCC_APBSMENR2_SPI1SMEN_Msk macro
Dstm32g070xx.h4628 #define RCC_APBSMENR2_SPI1SMEN RCC_APBSMENR2_SPI1SMEN_Msk macro
Dstm32g031xx.h4664 #define RCC_APBSMENR2_SPI1SMEN RCC_APBSMENR2_SPI1SMEN_Msk macro
Dstm32g041xx.h4918 #define RCC_APBSMENR2_SPI1SMEN RCC_APBSMENR2_SPI1SMEN_Msk macro
Dstm32g051xx.h5033 #define RCC_APBSMENR2_SPI1SMEN RCC_APBSMENR2_SPI1SMEN_Msk macro
Dstm32g061xx.h5287 #define RCC_APBSMENR2_SPI1SMEN RCC_APBSMENR2_SPI1SMEN_Msk macro
Dstm32g071xx.h5413 #define RCC_APBSMENR2_SPI1SMEN RCC_APBSMENR2_SPI1SMEN_Msk macro
Dstm32g081xx.h5667 #define RCC_APBSMENR2_SPI1SMEN RCC_APBSMENR2_SPI1SMEN_Msk macro
Dstm32g0b0xx.h5701 #define RCC_APBSMENR2_SPI1SMEN RCC_APBSMENR2_SPI1SMEN_Msk macro
Dstm32g0c1xx.h7058 #define RCC_APBSMENR2_SPI1SMEN RCC_APBSMENR2_SPI1SMEN_Msk macro
Dstm32g0b1xx.h6804 #define RCC_APBSMENR2_SPI1SMEN RCC_APBSMENR2_SPI1SMEN_Msk macro
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h5559 #define RCC_APBSMENR2_SPI1SMEN RCC_APBSMENR2_SPI1SMEN_Msk macro
Dstm32u083xx.h6423 #define RCC_APBSMENR2_SPI1SMEN RCC_APBSMENR2_SPI1SMEN_Msk macro
Dstm32u073xx.h6156 #define RCC_APBSMENR2_SPI1SMEN RCC_APBSMENR2_SPI1SMEN_Msk macro