Home
last modified time | relevance | path

Searched refs:RCC_APBENR2_SYSCFGEN_Pos (Results 1 – 18 of 18) sorted by relevance

/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h4108 #define RCC_APBENR2_SYSCFGEN_Pos (0U) macro
4109 #define RCC_APBENR2_SYSCFGEN_Msk (0x1UL << RCC_APBENR2_SYSCFGEN_Pos) /*!< 0x00000001 */
Dstm32c031xx.h4268 #define RCC_APBENR2_SYSCFGEN_Pos (0U) macro
4269 #define RCC_APBENR2_SYSCFGEN_Msk (0x1UL << RCC_APBENR2_SYSCFGEN_Pos) /*!< 0x00000001 */
Dstm32c071xx.h4736 #define RCC_APBENR2_SYSCFGEN_Pos (0U) macro
4737 #define RCC_APBENR2_SYSCFGEN_Msk (0x1UL << RCC_APBENR2_SYSCFGEN_Pos) /*!< 0x00000001 */
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h4344 #define RCC_APBENR2_SYSCFGEN_Pos (0U) macro
4345 #define RCC_APBENR2_SYSCFGEN_Msk (0x1UL << RCC_APBENR2_SYSCFGEN_Pos) /*!< 0x00000001 */
Dstm32g050xx.h4378 #define RCC_APBENR2_SYSCFGEN_Pos (0U) macro
4379 #define RCC_APBENR2_SYSCFGEN_Msk (0x1UL << RCC_APBENR2_SYSCFGEN_Pos) /*!< 0x00000001 */
Dstm32g070xx.h4519 #define RCC_APBENR2_SYSCFGEN_Pos (0U) macro
4520 #define RCC_APBENR2_SYSCFGEN_Msk (0x1UL << RCC_APBENR2_SYSCFGEN_Pos) /*!< 0x00000001 */
Dstm32g031xx.h4558 #define RCC_APBENR2_SYSCFGEN_Pos (0U) macro
4559 #define RCC_APBENR2_SYSCFGEN_Msk (0x1UL << RCC_APBENR2_SYSCFGEN_Pos) /*!< 0x00000001 */
Dstm32g041xx.h4806 #define RCC_APBENR2_SYSCFGEN_Pos (0U) macro
4807 #define RCC_APBENR2_SYSCFGEN_Msk (0x1UL << RCC_APBENR2_SYSCFGEN_Pos) /*!< 0x00000001 */
Dstm32g051xx.h4915 #define RCC_APBENR2_SYSCFGEN_Pos (0U) macro
4916 #define RCC_APBENR2_SYSCFGEN_Msk (0x1UL << RCC_APBENR2_SYSCFGEN_Pos) /*!< 0x00000001 */
Dstm32g061xx.h5163 #define RCC_APBENR2_SYSCFGEN_Pos (0U) macro
5164 #define RCC_APBENR2_SYSCFGEN_Msk (0x1UL << RCC_APBENR2_SYSCFGEN_Pos) /*!< 0x00000001 */
Dstm32g071xx.h5280 #define RCC_APBENR2_SYSCFGEN_Pos (0U) macro
5281 #define RCC_APBENR2_SYSCFGEN_Msk (0x1UL << RCC_APBENR2_SYSCFGEN_Pos) /*!< 0x00000001 */
Dstm32g081xx.h5528 #define RCC_APBENR2_SYSCFGEN_Pos (0U) macro
5529 #define RCC_APBENR2_SYSCFGEN_Msk (0x1UL << RCC_APBENR2_SYSCFGEN_Pos) /*!< 0x00000001 */
Dstm32g0b0xx.h5568 #define RCC_APBENR2_SYSCFGEN_Pos (0U) macro
5569 #define RCC_APBENR2_SYSCFGEN_Msk (0x1UL << RCC_APBENR2_SYSCFGEN_Pos) /*!< 0x00000001 */
Dstm32g0c1xx.h6886 #define RCC_APBENR2_SYSCFGEN_Pos (0U) macro
6887 #define RCC_APBENR2_SYSCFGEN_Msk (0x1UL << RCC_APBENR2_SYSCFGEN_Pos) /*!< 0x00000001 */
Dstm32g0b1xx.h6638 #define RCC_APBENR2_SYSCFGEN_Pos (0U) macro
6639 #define RCC_APBENR2_SYSCFGEN_Msk (0x1UL << RCC_APBENR2_SYSCFGEN_Pos) /*!< 0x00000001 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h5429 #define RCC_APBENR2_SYSCFGEN_Pos (0U) macro
5430 #define RCC_APBENR2_SYSCFGEN_Msk (0x1UL << RCC_APBENR2_SYSCFGEN_Pos) /*!< 0x00000001 */
Dstm32u083xx.h6263 #define RCC_APBENR2_SYSCFGEN_Pos (0U) macro
6264 #define RCC_APBENR2_SYSCFGEN_Msk (0x1UL << RCC_APBENR2_SYSCFGEN_Pos) /*!< 0x00000001 */
Dstm32u073xx.h5999 #define RCC_APBENR2_SYSCFGEN_Pos (0U) macro
6000 #define RCC_APBENR2_SYSCFGEN_Msk (0x1UL << RCC_APBENR2_SYSCFGEN_Pos) /*!< 0x00000001 */