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Searched refs:RCC_APBENR1_I2C2EN (Results 1 – 22 of 22) sorted by relevance

/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_hal_rcc.h879 SET_BIT(RCC->APBENR1, RCC_APBENR1_I2C2EN); \
881 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_I2C2EN); \
919 #define __HAL_RCC_I2C2_CLK_DISABLE() CLEAR_BIT(RCC->APBENR1, RCC_APBENR1_I2C2EN)
1079 #define __HAL_RCC_I2C2_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_I2C2EN) != 0U)
1102 #define __HAL_RCC_I2C2_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_I2C2EN) == 0U)
Dstm32c0xx_ll_bus.h106 #define LL_APB1_GRP1_PERIPH_I2C2 RCC_APBENR1_I2C2EN
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_hal_rcc.h1002 SET_BIT(RCC->APBENR1, RCC_APBENR1_I2C2EN); \
1004 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_I2C2EN); \
1114 #define __HAL_RCC_I2C2_CLK_DISABLE() CLEAR_BIT(RCC->APBENR1, RCC_APBENR1_I2C2EN)
1324 #define __HAL_RCC_I2C2_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_I2C2EN) != 0…
1386 #define __HAL_RCC_I2C2_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_I2C2EN) == 0…
Dstm32u0xx_ll_bus.h125 #define LL_APB1_GRP1_PERIPH_I2C2 RCC_APBENR1_I2C2EN
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h1170 SET_BIT(RCC->APBENR1, RCC_APBENR1_I2C2EN); \
1172 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_I2C2EN); \
1409 #define __HAL_RCC_I2C2_CLK_DISABLE() CLEAR_BIT(RCC->APBENR1, RCC_APBENR1_I2C2EN)
1570 #define __HAL_RCC_I2C2_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_I2C2EN) != 0U)
1634 #define __HAL_RCC_I2C2_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_I2C2EN) == 0U)
Dstm32g0xx_ll_bus.h147 #define LL_APB1_GRP1_PERIPH_I2C2 RCC_APBENR1_I2C2EN
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c071xx.h4727 #define RCC_APBENR1_I2C2EN RCC_APBENR1_I2C2EN_Msk macro
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h4335 #define RCC_APBENR1_I2C2EN RCC_APBENR1_I2C2EN_Msk macro
Dstm32g050xx.h4369 #define RCC_APBENR1_I2C2EN RCC_APBENR1_I2C2EN_Msk macro
Dstm32g070xx.h4510 #define RCC_APBENR1_I2C2EN RCC_APBENR1_I2C2EN_Msk macro
Dstm32g031xx.h4543 #define RCC_APBENR1_I2C2EN RCC_APBENR1_I2C2EN_Msk macro
Dstm32g041xx.h4791 #define RCC_APBENR1_I2C2EN RCC_APBENR1_I2C2EN_Msk macro
Dstm32g051xx.h4897 #define RCC_APBENR1_I2C2EN RCC_APBENR1_I2C2EN_Msk macro
Dstm32g061xx.h5145 #define RCC_APBENR1_I2C2EN RCC_APBENR1_I2C2EN_Msk macro
Dstm32g071xx.h5253 #define RCC_APBENR1_I2C2EN RCC_APBENR1_I2C2EN_Msk macro
Dstm32g081xx.h5501 #define RCC_APBENR1_I2C2EN RCC_APBENR1_I2C2EN_Msk macro
Dstm32g0b0xx.h5556 #define RCC_APBENR1_I2C2EN RCC_APBENR1_I2C2EN_Msk macro
Dstm32g0c1xx.h6856 #define RCC_APBENR1_I2C2EN RCC_APBENR1_I2C2EN_Msk macro
Dstm32g0b1xx.h6608 #define RCC_APBENR1_I2C2EN RCC_APBENR1_I2C2EN_Msk macro
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h5408 #define RCC_APBENR1_I2C2EN RCC_APBENR1_I2C2EN_Msk macro
Dstm32u083xx.h6236 #define RCC_APBENR1_I2C2EN RCC_APBENR1_I2C2EN_Msk macro
Dstm32u073xx.h5972 #define RCC_APBENR1_I2C2EN RCC_APBENR1_I2C2EN_Msk macro