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Searched refs:RCC_APBENR1_I2C1EN_Pos (Results 1 – 18 of 18) sorted by relevance

/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h4097 #define RCC_APBENR1_I2C1EN_Pos (21U) macro
4098 #define RCC_APBENR1_I2C1EN_Msk (0x1UL << RCC_APBENR1_I2C1EN_Pos) /*!< 0x00200000 */
Dstm32c031xx.h4257 #define RCC_APBENR1_I2C1EN_Pos (21U) macro
4258 #define RCC_APBENR1_I2C1EN_Msk (0x1UL << RCC_APBENR1_I2C1EN_Pos) /*!< 0x00200000 */
Dstm32c071xx.h4722 #define RCC_APBENR1_I2C1EN_Pos (21U) macro
4723 #define RCC_APBENR1_I2C1EN_Msk (0x1UL << RCC_APBENR1_I2C1EN_Pos) /*!< 0x00200000 */
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h4330 #define RCC_APBENR1_I2C1EN_Pos (21U) macro
4331 #define RCC_APBENR1_I2C1EN_Msk (0x1UL << RCC_APBENR1_I2C1EN_Pos) /*!< 0x00200000 */
Dstm32g050xx.h4364 #define RCC_APBENR1_I2C1EN_Pos (21U) macro
4365 #define RCC_APBENR1_I2C1EN_Msk (0x1UL << RCC_APBENR1_I2C1EN_Pos) /*!< 0x00200000 */
Dstm32g070xx.h4505 #define RCC_APBENR1_I2C1EN_Pos (21U) macro
4506 #define RCC_APBENR1_I2C1EN_Msk (0x1UL << RCC_APBENR1_I2C1EN_Pos) /*!< 0x00200000 */
Dstm32g031xx.h4538 #define RCC_APBENR1_I2C1EN_Pos (21U) macro
4539 #define RCC_APBENR1_I2C1EN_Msk (0x1UL << RCC_APBENR1_I2C1EN_Pos) /*!< 0x00200000 */
Dstm32g041xx.h4786 #define RCC_APBENR1_I2C1EN_Pos (21U) macro
4787 #define RCC_APBENR1_I2C1EN_Msk (0x1UL << RCC_APBENR1_I2C1EN_Pos) /*!< 0x00200000 */
Dstm32g051xx.h4892 #define RCC_APBENR1_I2C1EN_Pos (21U) macro
4893 #define RCC_APBENR1_I2C1EN_Msk (0x1UL << RCC_APBENR1_I2C1EN_Pos) /*!< 0x00200000 */
Dstm32g061xx.h5140 #define RCC_APBENR1_I2C1EN_Pos (21U) macro
5141 #define RCC_APBENR1_I2C1EN_Msk (0x1UL << RCC_APBENR1_I2C1EN_Pos) /*!< 0x00200000 */
Dstm32g071xx.h5248 #define RCC_APBENR1_I2C1EN_Pos (21U) macro
5249 #define RCC_APBENR1_I2C1EN_Msk (0x1UL << RCC_APBENR1_I2C1EN_Pos) /*!< 0x00200000 */
Dstm32g081xx.h5496 #define RCC_APBENR1_I2C1EN_Pos (21U) macro
5497 #define RCC_APBENR1_I2C1EN_Msk (0x1UL << RCC_APBENR1_I2C1EN_Pos) /*!< 0x00200000 */
Dstm32g0b0xx.h5551 #define RCC_APBENR1_I2C1EN_Pos (21U) macro
5552 #define RCC_APBENR1_I2C1EN_Msk (0x1UL << RCC_APBENR1_I2C1EN_Pos) /*!< 0x00200000 */
Dstm32g0c1xx.h6851 #define RCC_APBENR1_I2C1EN_Pos (21U) macro
6852 #define RCC_APBENR1_I2C1EN_Msk (0x1UL << RCC_APBENR1_I2C1EN_Pos) /*!< 0x00200000 */
Dstm32g0b1xx.h6603 #define RCC_APBENR1_I2C1EN_Pos (21U) macro
6604 #define RCC_APBENR1_I2C1EN_Msk (0x1UL << RCC_APBENR1_I2C1EN_Pos) /*!< 0x00200000 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h5403 #define RCC_APBENR1_I2C1EN_Pos (21U) macro
5404 #define RCC_APBENR1_I2C1EN_Msk (0x1UL << RCC_APBENR1_I2C1EN_Pos) /*!< 0x00200000 */
Dstm32u083xx.h6231 #define RCC_APBENR1_I2C1EN_Pos (21U) macro
6232 #define RCC_APBENR1_I2C1EN_Msk (0x1UL << RCC_APBENR1_I2C1EN_Pos) /*!< 0x00200000 */
Dstm32u073xx.h5967 #define RCC_APBENR1_I2C1EN_Pos (21U) macro
5968 #define RCC_APBENR1_I2C1EN_Msk (0x1UL << RCC_APBENR1_I2C1EN_Pos) /*!< 0x00200000 */