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Searched refs:RCC_APB1ENR1_TIM4EN (Results 1 – 25 of 61) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_hal_rcc.h835 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN); \
837 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN); \
1031 #define __HAL_RCC_TIM4_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN)
1404 #define __HAL_RCC_TIM4_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN) != 0U)
1464 #define __HAL_RCC_TIM4_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN) == 0U)
Dstm32g4xx_ll_bus.h138 #define LL_APB1_GRP1_PERIPH_TIM4 RCC_APB1ENR1_TIM4EN
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_rcc.h955 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN); \
957 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN); \
1176 #define __HAL_RCC_TIM4_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN)
1499 #define __HAL_RCC_TIM4_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN) != 0U)
1556 #define __HAL_RCC_TIM4_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN) == 0U)
Dstm32l5xx_ll_bus.h128 #define LL_APB1_GRP1_PERIPH_TIM4 RCC_APB1ENR1_TIM4EN
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_rcc.h1086 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN); \
1088 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN); \
1351 #define __HAL_RCC_TIM4_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN)
1895 #define __HAL_RCC_TIM4_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN) != 0U)
1994 #define __HAL_RCC_TIM4_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN) == 0U)
Dstm32l4xx_ll_bus.h175 #define LL_APB1_GRP1_PERIPH_TIM4 RCC_APB1ENR1_TIM4EN
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_rcc.h1474 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN); \
1476 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN); \
1647 #define __HAL_RCC_TIM4_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN)
2349 #define __HAL_RCC_TIM4_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN) != 0U)
2403 #define __HAL_RCC_TIM4_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN) == 0U)
Dstm32u5xx_ll_bus.h217 #define LL_APB1_GRP1_PERIPH_TIM4 RCC_APB1ENR1_TIM4EN
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_bus.h164 #define LL_APB1_GRP1_PERIPH_TIM4 RCC_APB1ENR1_TIM4EN
Dstm32h7rsxx_hal_rcc.h1359 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN);\
1577 #define __HAL_RCC_TIM4_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN)
2081 #define __HAL_RCC_TIM4_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN) != 0U)
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_bus.h254 #define LL_APB1_GRP1_PERIPH_TIM4 RCC_APB1ENR1_TIM4EN
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h7603 #define RCC_APB1ENR1_TIM4EN RCC_APB1ENR1_TIM4EN_Msk macro
Dstm32g411xc.h7777 #define RCC_APB1ENR1_TIM4EN RCC_APB1ENR1_TIM4EN_Msk macro
Dstm32g441xx.h7981 #define RCC_APB1ENR1_TIM4EN RCC_APB1ENR1_TIM4EN_Msk macro
Dstm32gbk1cb.h7737 #define RCC_APB1ENR1_TIM4EN RCC_APB1ENR1_TIM4EN_Msk macro
Dstm32g431xx.h7754 #define RCC_APB1ENR1_TIM4EN RCC_APB1ENR1_TIM4EN_Msk macro
Dstm32g4a1xx.h8360 #define RCC_APB1ENR1_TIM4EN RCC_APB1ENR1_TIM4EN_Msk macro
Dstm32g491xx.h8133 #define RCC_APB1ENR1_TIM4EN RCC_APB1ENR1_TIM4EN_Msk macro
Dstm32g473xx.h8823 #define RCC_APB1ENR1_TIM4EN RCC_APB1ENR1_TIM4EN_Msk macro
Dstm32g471xx.h8288 #define RCC_APB1ENR1_TIM4EN RCC_APB1ENR1_TIM4EN_Msk macro
Dstm32g483xx.h9050 #define RCC_APB1ENR1_TIM4EN RCC_APB1ENR1_TIM4EN_Msk macro
Dstm32g414xx.h11659 #define RCC_APB1ENR1_TIM4EN RCC_APB1ENR1_TIM4EN_Msk macro
Dstm32g474xx.h12396 #define RCC_APB1ENR1_TIM4EN RCC_APB1ENR1_TIM4EN_Msk macro
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l471xx.h11017 #define RCC_APB1ENR1_TIM4EN RCC_APB1ENR1_TIM4EN_Msk macro
Dstm32l475xx.h11181 #define RCC_APB1ENR1_TIM4EN RCC_APB1ENR1_TIM4EN_Msk macro

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