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Searched refs:RCC_AHBENR_RNGEN (Results 1 – 25 of 26) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wb0x/drivers/include/
Dstm32wb0x_ll_bus.h80 RCC_AHBENR_RNGEN)
88 #define LL_AHB1_GRP1_PERIPH_RNG RCC_AHBENR_RNGEN
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_hal_rcc_ex.h610 SET_BIT(RCC->AHBENR, RCC_AHBENR_RNGEN);\
612 tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_RNGEN);\
615 #define __HAL_RCC_RNG_CLK_DISABLE() CLEAR_BIT(RCC->AHBENR, (RCC_AHBENR_RNGEN))
617 #define __HAL_RCC_RNG_IS_CLK_ENABLED() (READ_BIT(RCC->AHBENR, RCC_AHBENR_RNGEN) != 0U)
618 #define __HAL_RCC_RNG_IS_CLK_DISABLED() (READ_BIT(RCC->AHBENR, RCC_AHBENR_RNGEN) == 0U)
Dstm32l0xx_ll_bus.h81 #define LL_AHB1_GRP1_PERIPH_RNG RCC_AHBENR_RNGEN /*!< RNG clock enable */
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_hal_rcc.h743 SET_BIT(RCC->AHBENR, RCC_AHBENR_RNGEN); \
745 … tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_RNGEN); \
768 #define __HAL_RCC_RNG_CLK_DISABLE() CLEAR_BIT(RCC->AHBENR, RCC_AHBENR_RNGEN)
1249 #define __HAL_RCC_RNG_IS_CLK_ENABLED() (READ_BIT(RCC->AHBENR, RCC_AHBENR_RNGEN) != 0U)
1265 #define __HAL_RCC_RNG_IS_CLK_DISABLED() (READ_BIT(RCC->AHBENR, RCC_AHBENR_RNGEN) == 0U)
Dstm32u0xx_ll_bus.h91 #define LL_AHB1_GRP1_PERIPH_RNG RCC_AHBENR_RNGEN
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h898 SET_BIT(RCC->AHBENR, RCC_AHBENR_RNGEN); \
900 … tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_RNGEN); \
922 #define __HAL_RCC_RNG_CLK_DISABLE() CLEAR_BIT(RCC->AHBENR, RCC_AHBENR_RNGEN)
1470 #define __HAL_RCC_RNG_IS_CLK_ENABLED() (READ_BIT(RCC->AHBENR, RCC_AHBENR_RNGEN) != RESET)
1483 #define __HAL_RCC_RNG_IS_CLK_DISABLED() (READ_BIT(RCC->AHBENR, RCC_AHBENR_RNGEN) == RESET)
Dstm32g0xx_ll_bus.h86 #define LL_AHB1_GRP1_PERIPH_RNG RCC_AHBENR_RNGEN
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h4048 #define RCC_AHBENR_RNGEN RCC_AHBENR_RNGEN_Msk /*!< RNG clock enabl… macro
Dstm32l062xx.h4179 #define RCC_AHBENR_RNGEN RCC_AHBENR_RNGEN_Msk /*!< RNG clock enabl… macro
Dstm32l053xx.h4195 #define RCC_AHBENR_RNGEN RCC_AHBENR_RNGEN_Msk /*!< RNG clock enabl… macro
Dstm32l072xx.h4227 #define RCC_AHBENR_RNGEN RCC_AHBENR_RNGEN_Msk /*!< RNG clock enabl… macro
Dstm32l073xx.h4372 #define RCC_AHBENR_RNGEN RCC_AHBENR_RNGEN_Msk /*!< RNG clock enabl… macro
Dstm32l083xx.h4503 #define RCC_AHBENR_RNGEN RCC_AHBENR_RNGEN_Msk /*!< RNG clock enabl… macro
Dstm32l063xx.h4324 #define RCC_AHBENR_RNGEN RCC_AHBENR_RNGEN_Msk /*!< RNG clock enabl… macro
Dstm32l082xx.h4358 #define RCC_AHBENR_RNGEN RCC_AHBENR_RNGEN_Msk /*!< RNG clock enabl… macro
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g041xx.h4762 #define RCC_AHBENR_RNGEN RCC_AHBENR_RNGEN_Msk macro
Dstm32g061xx.h5110 #define RCC_AHBENR_RNGEN RCC_AHBENR_RNGEN_Msk macro
Dstm32g081xx.h5460 #define RCC_AHBENR_RNGEN RCC_AHBENR_RNGEN_Msk macro
/hal_stm32-latest/stm32cube/stm32wb0x/soc/
Dstm32wb05.h3001 #define RCC_AHBENR_RNGEN RCC_AHBENR_RNGEN_Msk macro
Dstm32wb07.h3080 #define RCC_AHBENR_RNGEN RCC_AHBENR_RNGEN_Msk macro
Dstm32wb09.h3026 #define RCC_AHBENR_RNGEN RCC_AHBENR_RNGEN_Msk macro
Dstm32wb06.h3080 #define RCC_AHBENR_RNGEN RCC_AHBENR_RNGEN_Msk macro
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h5336 #define RCC_AHBENR_RNGEN RCC_AHBENR_RNGEN_Msk macro
Dstm32u083xx.h6146 #define RCC_AHBENR_RNGEN RCC_AHBENR_RNGEN_Msk macro
Dstm32u073xx.h5882 #define RCC_AHBENR_RNGEN RCC_AHBENR_RNGEN_Msk macro

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