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Searched refs:RCC_AHBENR_GPIOCEN (Results 1 – 25 of 58) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_hal_rcc.h636 SET_BIT(RCC->AHBENR, RCC_AHBENR_GPIOCEN);\
638 tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_GPIOCEN);\
679 #define __HAL_RCC_GPIOC_CLK_DISABLE() (RCC->AHBENR &= ~(RCC_AHBENR_GPIOCEN))
698 #define __HAL_RCC_GPIOC_IS_CLK_ENABLED() ((RCC->AHBENR & (RCC_AHBENR_GPIOCEN)) != RESET)
706 #define __HAL_RCC_GPIOC_IS_CLK_DISABLED() ((RCC->AHBENR & (RCC_AHBENR_GPIOCEN)) == RESET)
Dstm32f0xx_ll_bus.h82 #define LL_AHB1_GRP1_PERIPH_GPIOC RCC_AHBENR_GPIOCEN
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_hal_rcc.h696 SET_BIT(RCC->AHBENR, RCC_AHBENR_GPIOCEN);\
698 tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_GPIOCEN);\
753 #define __HAL_RCC_GPIOC_CLK_DISABLE() (RCC->AHBENR &= ~(RCC_AHBENR_GPIOCEN))
902 #define __HAL_RCC_GPIOC_IS_CLK_ENABLED() ((RCC->AHBENR & (RCC_AHBENR_GPIOCEN)) != RESET)
913 #define __HAL_RCC_GPIOC_IS_CLK_DISABLED() ((RCC->AHBENR & (RCC_AHBENR_GPIOCEN)) == RESET)
Dstm32f3xx_ll_bus.h88 #define LL_AHB1_GRP1_PERIPH_GPIOC RCC_AHBENR_GPIOCEN
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_hal_rcc.h657 SET_BIT(RCC->AHBENR, RCC_AHBENR_GPIOCEN);\
659 tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_GPIOCEN);\
700 #define __HAL_RCC_GPIOC_CLK_DISABLE() (RCC->AHBENR &= ~(RCC_AHBENR_GPIOCEN))
1114 #define __HAL_RCC_GPIOC_IS_CLK_ENABLED() ((RCC->AHBENR & (RCC_AHBENR_GPIOCEN)) != 0U)
1122 #define __HAL_RCC_GPIOC_IS_CLK_DISABLED() ((RCC->AHBENR & (RCC_AHBENR_GPIOCEN)) == 0U)
Dstm32l1xx_ll_bus.h75 #define LL_AHB1_GRP1_PERIPH_GPIOC RCC_AHBENR_GPIOCEN
/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h3068 #define RCC_AHBENR_GPIOCEN RCC_AHBENR_GPIOCEN_Msk /*!< GPIOC clock ena… macro
Dstm32f030x8.h3097 #define RCC_AHBENR_GPIOCEN RCC_AHBENR_GPIOCEN_Msk /*!< GPIOC clock ena… macro
Dstm32f070x6.h3134 #define RCC_AHBENR_GPIOCEN RCC_AHBENR_GPIOCEN_Msk /*!< GPIOC clock ena… macro
Dstm32f031x6.h3197 #define RCC_AHBENR_GPIOCEN RCC_AHBENR_GPIOCEN_Msk /*!< GPIOC clock ena… macro
Dstm32f030xc.h3385 #define RCC_AHBENR_GPIOCEN RCC_AHBENR_GPIOCEN_Msk /*!< GPIOC clock ena… macro
Dstm32f038xx.h3172 #define RCC_AHBENR_GPIOCEN RCC_AHBENR_GPIOCEN_Msk /*!< GPIOC clock ena… macro
Dstm32f070xb.h3247 #define RCC_AHBENR_GPIOCEN RCC_AHBENR_GPIOCEN_Msk /*!< GPIOC clock ena… macro
Dstm32f058xx.h3626 #define RCC_AHBENR_GPIOCEN RCC_AHBENR_GPIOCEN_Msk /*!< GPIOC clock ena… macro
Dstm32f051x8.h3651 #define RCC_AHBENR_GPIOCEN RCC_AHBENR_GPIOCEN_Msk /*!< GPIOC clock ena… macro
Dstm32f071xb.h4088 #define RCC_AHBENR_GPIOCEN RCC_AHBENR_GPIOCEN_Msk /*!< GPIOC clock ena… macro
/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l152xb.h4269 #define RCC_AHBENR_GPIOCEN RCC_AHBENR_GPIOCEN_Msk /*!< GPIO port C clo… macro
Dstm32l152xba.h4277 #define RCC_AHBENR_GPIOCEN RCC_AHBENR_GPIOCEN_Msk /*!< GPIO port C clo… macro
Dstm32l100xba.h4268 #define RCC_AHBENR_GPIOCEN RCC_AHBENR_GPIOCEN_Msk /*!< GPIO port C clo… macro
Dstm32l100xb.h4248 #define RCC_AHBENR_GPIOCEN RCC_AHBENR_GPIOCEN_Msk /*!< GPIO port C clo… macro
Dstm32l151xb.h4133 #define RCC_AHBENR_GPIOCEN RCC_AHBENR_GPIOCEN_Msk /*!< GPIO port C clo… macro
Dstm32l151xba.h4156 #define RCC_AHBENR_GPIOCEN RCC_AHBENR_GPIOCEN_Msk /*!< GPIO port C clo… macro
Dstm32l100xc.h4376 #define RCC_AHBENR_GPIOCEN RCC_AHBENR_GPIOCEN_Msk /*!< GPIO port C clo… macro
Dstm32l151xc.h4432 #define RCC_AHBENR_GPIOCEN RCC_AHBENR_GPIOCEN_Msk /*!< GPIO port C clo… macro
Dstm32l151xca.h4454 #define RCC_AHBENR_GPIOCEN RCC_AHBENR_GPIOCEN_Msk /*!< GPIO port C clo… macro

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