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Searched refs:RCC_AHB2ENR_GPIOGEN (Results 1 – 25 of 43) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_hal_rcc.h648 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN); \
650 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN); \
739 #define __HAL_RCC_GPIOG_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN)
1295 #define __HAL_RCC_GPIOG_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN) != 0U)
1334 #define __HAL_RCC_GPIOG_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN) == 0U)
Dstm32g4xx_ll_bus.h95 #define LL_AHB2_GRP1_PERIPH_GPIOG RCC_AHB2ENR_GPIOGEN
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_rcc.h784 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN); \
786 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN); \
871 #define __HAL_RCC_GPIOG_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN)
1419 #define __HAL_RCC_GPIOG_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN) != 0U)
1449 #define __HAL_RCC_GPIOG_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN) == 0U)
Dstm32l5xx_ll_bus.h94 #define LL_AHB2_GRP1_PERIPH_GPIOG RCC_AHB2ENR_GPIOGEN
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_rcc.h799 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN); \
801 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN); \
940 #define __HAL_RCC_GPIOG_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN)
1722 #define __HAL_RCC_GPIOG_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN) != 0U)
1787 #define __HAL_RCC_GPIOG_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN) == 0U)
Dstm32l4xx_ll_bus.h109 #define LL_AHB2_GRP1_PERIPH_GPIOG RCC_AHB2ENR_GPIOGEN
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc.h955 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN); \
957 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN); \
1090 #define __HAL_RCC_GPIOG_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN)
2175 #define __HAL_RCC_GPIOG_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN) != 0U)
2232 #define __HAL_RCC_GPIOG_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN) == 0U)
Dstm32h5xx_ll_bus.h151 #define LL_AHB2_GRP1_PERIPH_GPIOG RCC_AHB2ENR_GPIOGEN
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h7578 #define RCC_AHB2ENR_GPIOGEN RCC_AHB2ENR_GPIOGEN_Msk macro
Dstm32g411xc.h7749 #define RCC_AHB2ENR_GPIOGEN RCC_AHB2ENR_GPIOGEN_Msk macro
Dstm32g441xx.h7953 #define RCC_AHB2ENR_GPIOGEN RCC_AHB2ENR_GPIOGEN_Msk macro
Dstm32gbk1cb.h7712 #define RCC_AHB2ENR_GPIOGEN RCC_AHB2ENR_GPIOGEN_Msk macro
Dstm32g431xx.h7729 #define RCC_AHB2ENR_GPIOGEN RCC_AHB2ENR_GPIOGEN_Msk macro
Dstm32g4a1xx.h8326 #define RCC_AHB2ENR_GPIOGEN RCC_AHB2ENR_GPIOGEN_Msk macro
Dstm32g491xx.h8102 #define RCC_AHB2ENR_GPIOGEN RCC_AHB2ENR_GPIOGEN_Msk macro
Dstm32g473xx.h8783 #define RCC_AHB2ENR_GPIOGEN RCC_AHB2ENR_GPIOGEN_Msk macro
Dstm32g471xx.h8257 #define RCC_AHB2ENR_GPIOGEN RCC_AHB2ENR_GPIOGEN_Msk macro
Dstm32g483xx.h9007 #define RCC_AHB2ENR_GPIOGEN RCC_AHB2ENR_GPIOGEN_Msk macro
Dstm32g414xx.h11625 #define RCC_AHB2ENR_GPIOGEN RCC_AHB2ENR_GPIOGEN_Msk macro
Dstm32g474xx.h12356 #define RCC_AHB2ENR_GPIOGEN RCC_AHB2ENR_GPIOGEN_Msk macro
Dstm32g484xx.h12580 #define RCC_AHB2ENR_GPIOGEN RCC_AHB2ENR_GPIOGEN_Msk macro
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l471xx.h10986 #define RCC_AHB2ENR_GPIOGEN RCC_AHB2ENR_GPIOGEN_Msk macro
Dstm32l475xx.h11150 #define RCC_AHB2ENR_GPIOGEN RCC_AHB2ENR_GPIOGEN_Msk macro
Dstm32l476xx.h11182 #define RCC_AHB2ENR_GPIOGEN RCC_AHB2ENR_GPIOGEN_Msk macro
Dstm32l486xx.h11395 #define RCC_AHB2ENR_GPIOGEN RCC_AHB2ENR_GPIOGEN_Msk macro

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