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Searched refs:RCC_AHB2ENR_GPIOFEN_Pos (Results 1 – 25 of 35) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h7573 #define RCC_AHB2ENR_GPIOFEN_Pos (5U) macro
7574 #define RCC_AHB2ENR_GPIOFEN_Msk (0x1UL << RCC_AHB2ENR_GPIOFEN_Pos)/*!< 0x00000020 */
Dstm32g411xc.h7744 #define RCC_AHB2ENR_GPIOFEN_Pos (5U) macro
7745 #define RCC_AHB2ENR_GPIOFEN_Msk (0x1UL << RCC_AHB2ENR_GPIOFEN_Pos)/*!< 0x00000020 */
Dstm32g441xx.h7948 #define RCC_AHB2ENR_GPIOFEN_Pos (5U) macro
7949 #define RCC_AHB2ENR_GPIOFEN_Msk (0x1UL << RCC_AHB2ENR_GPIOFEN_Pos)/*!< 0x00000020 */
Dstm32gbk1cb.h7707 #define RCC_AHB2ENR_GPIOFEN_Pos (5U) macro
7708 #define RCC_AHB2ENR_GPIOFEN_Msk (0x1UL << RCC_AHB2ENR_GPIOFEN_Pos)/*!< 0x00000020 */
Dstm32g431xx.h7724 #define RCC_AHB2ENR_GPIOFEN_Pos (5U) macro
7725 #define RCC_AHB2ENR_GPIOFEN_Msk (0x1UL << RCC_AHB2ENR_GPIOFEN_Pos)/*!< 0x00000020 */
Dstm32g4a1xx.h8321 #define RCC_AHB2ENR_GPIOFEN_Pos (5U) macro
8322 #define RCC_AHB2ENR_GPIOFEN_Msk (0x1UL << RCC_AHB2ENR_GPIOFEN_Pos)/*!< 0x00000020 */
Dstm32g491xx.h8097 #define RCC_AHB2ENR_GPIOFEN_Pos (5U) macro
8098 #define RCC_AHB2ENR_GPIOFEN_Msk (0x1UL << RCC_AHB2ENR_GPIOFEN_Pos)/*!< 0x00000020 */
Dstm32g473xx.h8778 #define RCC_AHB2ENR_GPIOFEN_Pos (5U) macro
8779 #define RCC_AHB2ENR_GPIOFEN_Msk (0x1UL << RCC_AHB2ENR_GPIOFEN_Pos)/*!< 0x00000020 */
Dstm32g471xx.h8252 #define RCC_AHB2ENR_GPIOFEN_Pos (5U) macro
8253 #define RCC_AHB2ENR_GPIOFEN_Msk (0x1UL << RCC_AHB2ENR_GPIOFEN_Pos)/*!< 0x00000020 */
Dstm32g483xx.h9002 #define RCC_AHB2ENR_GPIOFEN_Pos (5U) macro
9003 #define RCC_AHB2ENR_GPIOFEN_Msk (0x1UL << RCC_AHB2ENR_GPIOFEN_Pos)/*!< 0x00000020 */
Dstm32g414xx.h11620 #define RCC_AHB2ENR_GPIOFEN_Pos (5U) macro
11621 #define RCC_AHB2ENR_GPIOFEN_Msk (0x1UL << RCC_AHB2ENR_GPIOFEN_Pos)/*!< 0x00000020 */
Dstm32g474xx.h12351 #define RCC_AHB2ENR_GPIOFEN_Pos (5U) macro
12352 #define RCC_AHB2ENR_GPIOFEN_Msk (0x1UL << RCC_AHB2ENR_GPIOFEN_Pos)/*!< 0x00000020 */
Dstm32g484xx.h12575 #define RCC_AHB2ENR_GPIOFEN_Pos (5U) macro
12576 #define RCC_AHB2ENR_GPIOFEN_Msk (0x1UL << RCC_AHB2ENR_GPIOFEN_Pos)/*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l471xx.h10981 #define RCC_AHB2ENR_GPIOFEN_Pos (5U) macro
10982 #define RCC_AHB2ENR_GPIOFEN_Msk (0x1UL << RCC_AHB2ENR_GPIOFEN_Pos) /*!< 0x00000020 */
Dstm32l475xx.h11145 #define RCC_AHB2ENR_GPIOFEN_Pos (5U) macro
11146 #define RCC_AHB2ENR_GPIOFEN_Msk (0x1UL << RCC_AHB2ENR_GPIOFEN_Pos) /*!< 0x00000020 */
Dstm32l476xx.h11177 #define RCC_AHB2ENR_GPIOFEN_Pos (5U) macro
11178 #define RCC_AHB2ENR_GPIOFEN_Msk (0x1UL << RCC_AHB2ENR_GPIOFEN_Pos) /*!< 0x00000020 */
Dstm32l486xx.h11390 #define RCC_AHB2ENR_GPIOFEN_Pos (5U) macro
11391 #define RCC_AHB2ENR_GPIOFEN_Msk (0x1UL << RCC_AHB2ENR_GPIOFEN_Pos) /*!< 0x00000020 */
Dstm32l485xx.h11364 #define RCC_AHB2ENR_GPIOFEN_Pos (5U) macro
11365 #define RCC_AHB2ENR_GPIOFEN_Msk (0x1UL << RCC_AHB2ENR_GPIOFEN_Pos) /*!< 0x00000020 */
Dstm32l4a6xx.h12511 #define RCC_AHB2ENR_GPIOFEN_Pos (5U) macro
12512 #define RCC_AHB2ENR_GPIOFEN_Msk (0x1UL << RCC_AHB2ENR_GPIOFEN_Pos) /*!< 0x00000020 */
Dstm32l496xx.h12183 #define RCC_AHB2ENR_GPIOFEN_Pos (5U) macro
12184 #define RCC_AHB2ENR_GPIOFEN_Msk (0x1UL << RCC_AHB2ENR_GPIOFEN_Pos) /*!< 0x00000020 */
Dstm32l4r5xx.h12398 #define RCC_AHB2ENR_GPIOFEN_Pos (5U) macro
12399 #define RCC_AHB2ENR_GPIOFEN_Msk (0x1UL << RCC_AHB2ENR_GPIOFEN_Pos) /*!< 0x00000020 */
Dstm32l4r7xx.h12888 #define RCC_AHB2ENR_GPIOFEN_Pos (5U) macro
12889 #define RCC_AHB2ENR_GPIOFEN_Msk (0x1UL << RCC_AHB2ENR_GPIOFEN_Pos) /*!< 0x00000020 */
Dstm32l4s5xx.h12733 #define RCC_AHB2ENR_GPIOFEN_Pos (5U) macro
12734 #define RCC_AHB2ENR_GPIOFEN_Msk (0x1UL << RCC_AHB2ENR_GPIOFEN_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h11695 #define RCC_AHB2ENR_GPIOFEN_Pos (5U) macro
11696 #define RCC_AHB2ENR_GPIOFEN_Msk (0x1UL << RCC_AHB2ENR_GPIOFEN_Pos)/*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h13241 #define RCC_AHB2ENR_GPIOFEN_Pos (5U) macro
13242 #define RCC_AHB2ENR_GPIOFEN_Msk (0x1UL << RCC_AHB2ENR_GPIOFEN_Pos) /*!< 0x00000020…

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