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Searched refs:PWR_SR1_WUF5 (Results 1 – 25 of 67) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wb0x/drivers/include/
Dstm32wb0x_hal_pwr.h279 …((__FLAG__) == PWR_FLAG_WUF5) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF5) == PWR_SR1_WUF5) …
320 …((__FLAG__) == PWR_FLAG_WUF5) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF5) == PWR_SR1_WUF5) …
434 … ((__FLAG__) == PWR_FLAG_WUF5) ? (SET_BIT(PWR->SR1, PWR_SR1_WUF5)) : \
472 … ((__FLAG__) == PWR_FLAG_WUF5) ? (SET_BIT(PWR->SR1, PWR_SR1_WUF5)) : \
Dstm32wb0x_ll_pwr.h198 #define LL_PWR_SR1_WUF5 PWR_SR1_WUF5
1454 return ((READ_BIT(PWR->SR1, PWR_SR1_WUF5) == (PWR_SR1_WUF5)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_WU5()
1904 WRITE_REG(PWR->SR1, PWR_SR1_WUF5); in LL_PWR_ClearFlag_WU5()
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_pwr.h78 #if defined(PWR_SR1_WUF5)
79 #define LL_PWR_SR1_WUF5 PWR_SR1_WUF5
910 return ((READ_BIT(PWR->SR1, PWR_SR1_WUF5) == (PWR_SR1_WUF5)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_WU5()
Dstm32c0xx_hal_pwr.h137 #define PWR_FLAG_WUF5 (0x00010000u | PWR_SR1_WUF5) /*!< Wakeup event on …
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_ll_pwr.h76 #define LL_PWR_SR1_WUF5 PWR_SR1_WUF5
1267 return ((READ_BIT(PWR->SR1, PWR_SR1_WUF5) == (PWR_SR1_WUF5)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_WU5()
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_pwr.h78 #define LL_PWR_SR1_WUF5 PWR_SR1_WUF5
1292 return ((READ_BIT(PWR->SR1, PWR_SR1_WUF5) == (PWR_SR1_WUF5)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_WU5()
Dstm32g0xx_hal_pwr.h147 #define PWR_FLAG_WUF5 (0x00010000u | PWR_SR1_WUF5) /*!< Wakeup event on …
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_pwr.h77 #define LL_PWR_SR1_WUF5 PWR_SR1_WUF5
1435 return ((READ_BIT(PWR->SR1, PWR_SR1_WUF5) == (PWR_SR1_WUF5)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_WU5()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_pwr.h75 #define LL_PWR_SR1_WUF5 PWR_SR1_WUF5
1377 return ((READ_BIT(PWR->SR1, PWR_SR1_WUF5) == (PWR_SR1_WUF5)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_WU5()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_pwr.h74 #define LL_PWR_SR1_WUF5 PWR_SR1_WUF5
1307 temp = READ_BIT(PWR->SR1, PWR_SR1_WUF5); in LL_PWR_IsActiveFlag_WU5()
1309 return ((temp == (PWR_SR1_WUF5))?1U:0U); in LL_PWR_IsActiveFlag_WU5()
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_pwr.h116 #define LL_PWR_SR1_WUF5 PWR_SR1_WUF5
1948 return ((READ_BIT(PWR->SR1, PWR_SR1_WUF5) == (PWR_SR1_WUF5)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_WU5()
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c071xx.h3905 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wakeup Flag 5 */ macro
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g070xx.h3668 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wakeup Flag 5 */ macro
Dstm32g071xx.h4367 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wakeup Flag 5 */ macro
Dstm32g081xx.h4603 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wakeup Flag 5 */ macro
Dstm32g0b0xx.h4446 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wakeup Flag 5 */ macro
/hal_stm32-latest/stm32cube/stm32wb0x/soc/
Dstm32wb05.h3286 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk macro
Dstm32wb07.h3364 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk macro
Dstm32wb09.h3314 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk macro
Dstm32wb06.h3364 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk macro
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h4476 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wakeup Flag 5 */ macro
Dstm32u083xx.h5139 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wakeup Flag 5 */ macro
Dstm32u073xx.h4881 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wakeup Flag 5 */ macro
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h6423 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wake-up Flag 5 … macro
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h5125 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wake-up Flag 5 … macro

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