Home
last modified time | relevance | path

Searched refs:PWR_PDCRE_PE0_Pos (Results 1 – 25 of 37) sorted by relevance

12

/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h6971 #define PWR_PDCRE_PE0_Pos (0U) macro
6972 #define PWR_PDCRE_PE0_Msk (0x1UL << PWR_PDCRE_PE0_Pos) /*!< 0x00000001 */
Dstm32g411xc.h7136 #define PWR_PDCRE_PE0_Pos (0U) macro
7137 #define PWR_PDCRE_PE0_Msk (0x1UL << PWR_PDCRE_PE0_Pos) /*!< 0x00000001 */
Dstm32g441xx.h7325 #define PWR_PDCRE_PE0_Pos (0U) macro
7326 #define PWR_PDCRE_PE0_Msk (0x1UL << PWR_PDCRE_PE0_Pos) /*!< 0x00000001 */
Dstm32gbk1cb.h7090 #define PWR_PDCRE_PE0_Pos (0U) macro
7091 #define PWR_PDCRE_PE0_Msk (0x1UL << PWR_PDCRE_PE0_Pos) /*!< 0x00000001 */
Dstm32g431xx.h7104 #define PWR_PDCRE_PE0_Pos (0U) macro
7105 #define PWR_PDCRE_PE0_Msk (0x1UL << PWR_PDCRE_PE0_Pos) /*!< 0x00000001 */
Dstm32g4a1xx.h7489 #define PWR_PDCRE_PE0_Pos (0U) macro
7490 #define PWR_PDCRE_PE0_Msk (0x1UL << PWR_PDCRE_PE0_Pos) /*!< 0x00000001 */
Dstm32g491xx.h7268 #define PWR_PDCRE_PE0_Pos (0U) macro
7269 #define PWR_PDCRE_PE0_Msk (0x1UL << PWR_PDCRE_PE0_Pos) /*!< 0x00000001 */
Dstm32g473xx.h7853 #define PWR_PDCRE_PE0_Pos (0U) macro
7854 #define PWR_PDCRE_PE0_Msk (0x1UL << PWR_PDCRE_PE0_Pos) /*!< 0x00000001 */
Dstm32g471xx.h7339 #define PWR_PDCRE_PE0_Pos (0U) macro
7340 #define PWR_PDCRE_PE0_Msk (0x1UL << PWR_PDCRE_PE0_Pos) /*!< 0x00000001 */
Dstm32g483xx.h8074 #define PWR_PDCRE_PE0_Pos (0U) macro
8075 #define PWR_PDCRE_PE0_Msk (0x1UL << PWR_PDCRE_PE0_Pos) /*!< 0x00000001 */
Dstm32g414xx.h10919 #define PWR_PDCRE_PE0_Pos (0U) macro
10920 #define PWR_PDCRE_PE0_Msk (0x1UL << PWR_PDCRE_PE0_Pos) /*!< 0x00000001 */
Dstm32g474xx.h11423 #define PWR_PDCRE_PE0_Pos (0U) macro
11424 #define PWR_PDCRE_PE0_Msk (0x1UL << PWR_PDCRE_PE0_Pos) /*!< 0x00000001 */
Dstm32g484xx.h11644 #define PWR_PDCRE_PE0_Pos (0U) macro
11645 #define PWR_PDCRE_PE0_Msk (0x1UL << PWR_PDCRE_PE0_Pos) /*!< 0x00000001 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb35xx.h6773 #define PWR_PDCRE_PE0_Pos (0U) macro
6774 #define PWR_PDCRE_PE0_Msk (0x1UL << PWR_PDCRE_PE0_Pos) /*!< 0x00000001 */
Dstm32wb55xx.h6955 #define PWR_PDCRE_PE0_Pos (0U) macro
6956 #define PWR_PDCRE_PE0_Msk (0x1UL << PWR_PDCRE_PE0_Pos) /*!< 0x00000001 */
Dstm32wb5mxx.h6955 #define PWR_PDCRE_PE0_Pos (0U) macro
6956 #define PWR_PDCRE_PE0_Msk (0x1UL << PWR_PDCRE_PE0_Pos) /*!< 0x00000001 */
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l433xx.h9225 #define PWR_PDCRE_PE0_Pos (0U) macro
9226 #define PWR_PDCRE_PE0_Msk (0x1UL << PWR_PDCRE_PE0_Pos) /*!< 0x00000001 */
Dstm32l451xx.h9390 #define PWR_PDCRE_PE0_Pos (0U) macro
9391 #define PWR_PDCRE_PE0_Msk (0x1UL << PWR_PDCRE_PE0_Pos) /*!< 0x00000001 */
Dstm32l431xx.h9133 #define PWR_PDCRE_PE0_Pos (0U) macro
9134 #define PWR_PDCRE_PE0_Msk (0x1UL << PWR_PDCRE_PE0_Pos) /*!< 0x00000001 */
Dstm32l443xx.h9441 #define PWR_PDCRE_PE0_Pos (0U) macro
9442 #define PWR_PDCRE_PE0_Msk (0x1UL << PWR_PDCRE_PE0_Pos) /*!< 0x00000001 */
Dstm32l471xx.h10097 #define PWR_PDCRE_PE0_Pos (0U) macro
10098 #define PWR_PDCRE_PE0_Msk (0x1UL << PWR_PDCRE_PE0_Pos) /*!< 0x00000001 */
Dstm32l452xx.h9459 #define PWR_PDCRE_PE0_Pos (0U) macro
9460 #define PWR_PDCRE_PE0_Msk (0x1UL << PWR_PDCRE_PE0_Pos) /*!< 0x00000001 */
Dstm32l462xx.h9675 #define PWR_PDCRE_PE0_Pos (0U) macro
9676 #define PWR_PDCRE_PE0_Msk (0x1UL << PWR_PDCRE_PE0_Pos) /*!< 0x00000001 */
Dstm32l475xx.h10261 #define PWR_PDCRE_PE0_Pos (0U) macro
10262 #define PWR_PDCRE_PE0_Msk (0x1UL << PWR_PDCRE_PE0_Pos) /*!< 0x00000001 */
Dstm32l476xx.h10290 #define PWR_PDCRE_PE0_Pos (0U) macro
10291 #define PWR_PDCRE_PE0_Msk (0x1UL << PWR_PDCRE_PE0_Pos) /*!< 0x00000001 */

12