Searched refs:OPAMP_CSR_VM_SEL_Pos (Results 1 – 15 of 15) sorted by relevance
4304 #define OPAMP_CSR_VM_SEL_Pos (8U) macro4305 #define OPAMP_CSR_VM_SEL_Msk (0x3UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000003…4307 #define OPAMP_CSR_VM_SEL_0 (0x1UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000001…4308 #define OPAMP_CSR_VM_SEL_1 (0x2UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000002…
4961 #define OPAMP_CSR_VM_SEL_Pos (8U) macro4962 #define OPAMP_CSR_VM_SEL_Msk (0x3UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000003…4964 #define OPAMP_CSR_VM_SEL_0 (0x1UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000001…4965 #define OPAMP_CSR_VM_SEL_1 (0x2UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000002…
4703 #define OPAMP_CSR_VM_SEL_Pos (8U) macro4704 #define OPAMP_CSR_VM_SEL_Msk (0x3UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000003…4706 #define OPAMP_CSR_VM_SEL_0 (0x1UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000001…4707 #define OPAMP_CSR_VM_SEL_1 (0x2UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000002…
9813 #define OPAMP_CSR_VM_SEL_Pos (8U) macro9814 #define OPAMP_CSR_VM_SEL_Msk (0x3UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000003…9816 #define OPAMP_CSR_VM_SEL_0 (0x1UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000001…9817 #define OPAMP_CSR_VM_SEL_1 (0x2UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000002…
9413 #define OPAMP_CSR_VM_SEL_Pos (8U) macro9414 #define OPAMP_CSR_VM_SEL_Msk (0x3UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000003…9416 #define OPAMP_CSR_VM_SEL_0 (0x1UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000001…9417 #define OPAMP_CSR_VM_SEL_1 (0x2UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000002…
10436 #define OPAMP_CSR_VM_SEL_Pos (8U) macro10437 #define OPAMP_CSR_VM_SEL_Msk (0x3UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000003…10439 #define OPAMP_CSR_VM_SEL_0 (0x1UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000001…10440 #define OPAMP_CSR_VM_SEL_1 (0x2UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000002…
10885 #define OPAMP_CSR_VM_SEL_Pos (8U) macro10886 #define OPAMP_CSR_VM_SEL_Msk (0x3UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000003…10888 #define OPAMP_CSR_VM_SEL_0 (0x1UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000001…10889 #define OPAMP_CSR_VM_SEL_1 (0x2UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000002…
10746 #define OPAMP_CSR_VM_SEL_Pos (8U) macro10747 #define OPAMP_CSR_VM_SEL_Msk (0x3UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000003…10749 #define OPAMP_CSR_VM_SEL_0 (0x1UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000001…10750 #define OPAMP_CSR_VM_SEL_1 (0x2UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000002…
11195 #define OPAMP_CSR_VM_SEL_Pos (8U) macro11196 #define OPAMP_CSR_VM_SEL_Msk (0x3UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000003…11198 #define OPAMP_CSR_VM_SEL_0 (0x1UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000001…11199 #define OPAMP_CSR_VM_SEL_1 (0x2UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000002…
12244 #define OPAMP_CSR_VM_SEL_Pos (8U) macro12245 #define OPAMP_CSR_VM_SEL_Msk (0x3UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000003…12247 #define OPAMP_CSR_VM_SEL_0 (0x1UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000001…12248 #define OPAMP_CSR_VM_SEL_1 (0x2UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000002…
14465 #define OPAMP_CSR_VM_SEL_Pos (8U) macro14466 #define OPAMP_CSR_VM_SEL_Msk (0x3UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000003…14468 #define OPAMP_CSR_VM_SEL_0 (0x1UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000001…14469 #define OPAMP_CSR_VM_SEL_1 (0x2UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000002…
12693 #define OPAMP_CSR_VM_SEL_Pos (8U) macro12694 #define OPAMP_CSR_VM_SEL_Msk (0x3UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000003…12696 #define OPAMP_CSR_VM_SEL_0 (0x1UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000001…12697 #define OPAMP_CSR_VM_SEL_1 (0x2UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000002…
15370 #define OPAMP_CSR_VM_SEL_Pos (8U) macro15371 #define OPAMP_CSR_VM_SEL_Msk (0x3UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000003…15373 #define OPAMP_CSR_VM_SEL_0 (0x1UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000001…15374 #define OPAMP_CSR_VM_SEL_1 (0x2UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000002…
14914 #define OPAMP_CSR_VM_SEL_Pos (8U) macro14915 #define OPAMP_CSR_VM_SEL_Msk (0x3UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000003…14917 #define OPAMP_CSR_VM_SEL_0 (0x1UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000001…14918 #define OPAMP_CSR_VM_SEL_1 (0x2UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000002…
15819 #define OPAMP_CSR_VM_SEL_Pos (8U) macro15820 #define OPAMP_CSR_VM_SEL_Msk (0x3UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000003…15822 #define OPAMP_CSR_VM_SEL_0 (0x1UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000001…15823 #define OPAMP_CSR_VM_SEL_1 (0x2UL << OPAMP_CSR_VM_SEL_Pos) /*!< 0x000002…
