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Searched refs:OPAMP_CSR_PGA_GAIN_Pos (Results 1 – 15 of 15) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h4298 #define OPAMP_CSR_PGA_GAIN_Pos (4U) macro
4299 #define OPAMP_CSR_PGA_GAIN_Msk (0x3UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
4301 #define OPAMP_CSR_PGA_GAIN_0 (0x1UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
4302 #define OPAMP_CSR_PGA_GAIN_1 (0x2UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
Dstm32u083xx.h4955 #define OPAMP_CSR_PGA_GAIN_Pos (4U) macro
4956 #define OPAMP_CSR_PGA_GAIN_Msk (0x3UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
4958 #define OPAMP_CSR_PGA_GAIN_0 (0x1UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
4959 #define OPAMP_CSR_PGA_GAIN_1 (0x2UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
Dstm32u073xx.h4697 #define OPAMP_CSR_PGA_GAIN_Pos (4U) macro
4698 #define OPAMP_CSR_PGA_GAIN_Msk (0x3UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
4700 #define OPAMP_CSR_PGA_GAIN_0 (0x1UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
4701 #define OPAMP_CSR_PGA_GAIN_1 (0x2UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h9808 #define OPAMP_CSR_PGA_GAIN_Pos (4U) macro
9809 #define OPAMP_CSR_PGA_GAIN_Msk (0x3UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
9811 #define OPAMP_CSR_PGA_GAIN_0 (0x1UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
9812 #define OPAMP_CSR_PGA_GAIN_1 (0x2UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
Dstm32u535xx.h9408 #define OPAMP_CSR_PGA_GAIN_Pos (4U) macro
9409 #define OPAMP_CSR_PGA_GAIN_Msk (0x3UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
9411 #define OPAMP_CSR_PGA_GAIN_0 (0x1UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
9412 #define OPAMP_CSR_PGA_GAIN_1 (0x2UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
Dstm32u575xx.h10431 #define OPAMP_CSR_PGA_GAIN_Pos (4U) macro
10432 #define OPAMP_CSR_PGA_GAIN_Msk (0x3UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
10434 #define OPAMP_CSR_PGA_GAIN_0 (0x1UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
10435 #define OPAMP_CSR_PGA_GAIN_1 (0x2UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
Dstm32u585xx.h10880 #define OPAMP_CSR_PGA_GAIN_Pos (4U) macro
10881 #define OPAMP_CSR_PGA_GAIN_Msk (0x3UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
10883 #define OPAMP_CSR_PGA_GAIN_0 (0x1UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
10884 #define OPAMP_CSR_PGA_GAIN_1 (0x2UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
Dstm32u595xx.h10741 #define OPAMP_CSR_PGA_GAIN_Pos (4U) macro
10742 #define OPAMP_CSR_PGA_GAIN_Msk (0x3UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
10744 #define OPAMP_CSR_PGA_GAIN_0 (0x1UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
10745 #define OPAMP_CSR_PGA_GAIN_1 (0x2UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
Dstm32u5a5xx.h11190 #define OPAMP_CSR_PGA_GAIN_Pos (4U) macro
11191 #define OPAMP_CSR_PGA_GAIN_Msk (0x3UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
11193 #define OPAMP_CSR_PGA_GAIN_0 (0x1UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
11194 #define OPAMP_CSR_PGA_GAIN_1 (0x2UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
Dstm32u5f7xx.h12239 #define OPAMP_CSR_PGA_GAIN_Pos (4U) macro
12240 #define OPAMP_CSR_PGA_GAIN_Msk (0x3UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
12242 #define OPAMP_CSR_PGA_GAIN_0 (0x1UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
12243 #define OPAMP_CSR_PGA_GAIN_1 (0x2UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
Dstm32u599xx.h14460 #define OPAMP_CSR_PGA_GAIN_Pos (4U) macro
14461 #define OPAMP_CSR_PGA_GAIN_Msk (0x3UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
14463 #define OPAMP_CSR_PGA_GAIN_0 (0x1UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
14464 #define OPAMP_CSR_PGA_GAIN_1 (0x2UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
Dstm32u5g7xx.h12688 #define OPAMP_CSR_PGA_GAIN_Pos (4U) macro
12689 #define OPAMP_CSR_PGA_GAIN_Msk (0x3UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
12691 #define OPAMP_CSR_PGA_GAIN_0 (0x1UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
12692 #define OPAMP_CSR_PGA_GAIN_1 (0x2UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
Dstm32u5f9xx.h15365 #define OPAMP_CSR_PGA_GAIN_Pos (4U) macro
15366 #define OPAMP_CSR_PGA_GAIN_Msk (0x3UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
15368 #define OPAMP_CSR_PGA_GAIN_0 (0x1UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
15369 #define OPAMP_CSR_PGA_GAIN_1 (0x2UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
Dstm32u5a9xx.h14909 #define OPAMP_CSR_PGA_GAIN_Pos (4U) macro
14910 #define OPAMP_CSR_PGA_GAIN_Msk (0x3UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
14912 #define OPAMP_CSR_PGA_GAIN_0 (0x1UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
14913 #define OPAMP_CSR_PGA_GAIN_1 (0x2UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
Dstm32u5g9xx.h15814 #define OPAMP_CSR_PGA_GAIN_Pos (4U) macro
15815 #define OPAMP_CSR_PGA_GAIN_Msk (0x3UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
15817 #define OPAMP_CSR_PGA_GAIN_0 (0x1UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…
15818 #define OPAMP_CSR_PGA_GAIN_1 (0x2UL << OPAMP_CSR_PGA_GAIN_Pos) /*!< 0x000000…