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Searched refs:IOPORT_BASE (Results 1 – 25 of 36) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32c0xx/drivers/src/
Dstm32c0xx_hal_rcc.c90 #define RCC_GET_MCO_GPIO_PORT(__RCC_MCOx__) (IOPORT_BASE + ((0x00000400UL) * RCC_GET_MCO_GPIO_INDE…
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c031xx.h501 #define IOPORT_BASE (0x50000000UL) /*!< IOPORT base address */ macro
565 #define GPIOA_BASE (IOPORT_BASE + 0x00000000UL)
566 #define GPIOB_BASE (IOPORT_BASE + 0x00000400UL)
567 #define GPIOC_BASE (IOPORT_BASE + 0x00000800UL)
568 #define GPIOD_BASE (IOPORT_BASE + 0x00000C00UL)
569 #define GPIOF_BASE (IOPORT_BASE + 0x00001400UL)
Dstm32c071xx.h557 #define IOPORT_BASE (0x50000000UL) /*!< IOPORT base address */ macro
632 #define GPIOA_BASE (IOPORT_BASE + 0x00000000UL)
633 #define GPIOB_BASE (IOPORT_BASE + 0x00000400UL)
634 #define GPIOC_BASE (IOPORT_BASE + 0x00000800UL)
635 #define GPIOD_BASE (IOPORT_BASE + 0x00000C00UL)
636 #define GPIOF_BASE (IOPORT_BASE + 0x00001400UL)
Dstm32c011xx.h499 #define IOPORT_BASE (0x50000000UL) /*!< IOPORT base address */ macro
563 #define GPIOA_BASE (IOPORT_BASE + 0x00000000UL)
564 #define GPIOB_BASE (IOPORT_BASE + 0x00000400UL)
565 #define GPIOC_BASE (IOPORT_BASE + 0x00000800UL)
566 #define GPIOF_BASE (IOPORT_BASE + 0x00001400UL)
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h527 #define IOPORT_BASE (0x50000000UL) /*!< IOPORT base address */ macro
591 #define GPIOA_BASE (IOPORT_BASE + 0x00000000UL)
592 #define GPIOB_BASE (IOPORT_BASE + 0x00000400UL)
593 #define GPIOC_BASE (IOPORT_BASE + 0x00000800UL)
594 #define GPIOD_BASE (IOPORT_BASE + 0x00000C00UL)
595 #define GPIOF_BASE (IOPORT_BASE + 0x00001400UL)
Dstm32g050xx.h532 #define IOPORT_BASE (0x50000000UL) /*!< IOPORT base address */ macro
603 #define GPIOA_BASE (IOPORT_BASE + 0x00000000UL)
604 #define GPIOB_BASE (IOPORT_BASE + 0x00000400UL)
605 #define GPIOC_BASE (IOPORT_BASE + 0x00000800UL)
606 #define GPIOD_BASE (IOPORT_BASE + 0x00000C00UL)
607 #define GPIOF_BASE (IOPORT_BASE + 0x00001400UL)
Dstm32g070xx.h531 #define IOPORT_BASE (0x50000000UL) /*!< IOPORT base address */ macro
604 #define GPIOA_BASE (IOPORT_BASE + 0x00000000UL)
605 #define GPIOB_BASE (IOPORT_BASE + 0x00000400UL)
606 #define GPIOC_BASE (IOPORT_BASE + 0x00000800UL)
607 #define GPIOD_BASE (IOPORT_BASE + 0x00000C00UL)
608 #define GPIOF_BASE (IOPORT_BASE + 0x00001400UL)
Dstm32g0b0xx.h571 #define IOPORT_BASE (0x50000000UL) /*!< IOPORT base address */ macro
666 #define GPIOA_BASE (IOPORT_BASE + 0x00000000UL)
667 #define GPIOB_BASE (IOPORT_BASE + 0x00000400UL)
668 #define GPIOC_BASE (IOPORT_BASE + 0x00000800UL)
669 #define GPIOD_BASE (IOPORT_BASE + 0x00000C00UL)
670 #define GPIOE_BASE (IOPORT_BASE + 0x00001000UL)
671 #define GPIOF_BASE (IOPORT_BASE + 0x00001400UL)
Dstm32g031xx.h560 #define IOPORT_BASE (0x50000000UL) /*!< IOPORT base address */ macro
629 #define GPIOA_BASE (IOPORT_BASE + 0x00000000UL)
630 #define GPIOB_BASE (IOPORT_BASE + 0x00000400UL)
631 #define GPIOC_BASE (IOPORT_BASE + 0x00000800UL)
632 #define GPIOD_BASE (IOPORT_BASE + 0x00000C00UL)
633 #define GPIOF_BASE (IOPORT_BASE + 0x00001400UL)
Dstm32g041xx.h602 #define IOPORT_BASE (0x50000000UL) /*!< IOPORT base address */ macro
673 #define GPIOA_BASE (IOPORT_BASE + 0x00000000UL)
674 #define GPIOB_BASE (IOPORT_BASE + 0x00000400UL)
675 #define GPIOC_BASE (IOPORT_BASE + 0x00000800UL)
676 #define GPIOD_BASE (IOPORT_BASE + 0x00000C00UL)
677 #define GPIOF_BASE (IOPORT_BASE + 0x00001400UL)
Dstm32g051xx.h600 #define IOPORT_BASE (0x50000000UL) /*!< IOPORT base address */ macro
680 #define GPIOA_BASE (IOPORT_BASE + 0x00000000UL)
681 #define GPIOB_BASE (IOPORT_BASE + 0x00000400UL)
682 #define GPIOC_BASE (IOPORT_BASE + 0x00000800UL)
683 #define GPIOD_BASE (IOPORT_BASE + 0x00000C00UL)
684 #define GPIOF_BASE (IOPORT_BASE + 0x00001400UL)
Dstm32g061xx.h642 #define IOPORT_BASE (0x50000000UL) /*!< IOPORT base address */ macro
724 #define GPIOA_BASE (IOPORT_BASE + 0x00000000UL)
725 #define GPIOB_BASE (IOPORT_BASE + 0x00000400UL)
726 #define GPIOC_BASE (IOPORT_BASE + 0x00000800UL)
727 #define GPIOD_BASE (IOPORT_BASE + 0x00000C00UL)
728 #define GPIOF_BASE (IOPORT_BASE + 0x00001400UL)
Dstm32g0c1xx.h792 #define IOPORT_BASE (0x50000000UL) /*!< IOPORT base address */ macro
908 #define GPIOA_BASE (IOPORT_BASE + 0x00000000UL)
909 #define GPIOB_BASE (IOPORT_BASE + 0x00000400UL)
910 #define GPIOC_BASE (IOPORT_BASE + 0x00000800UL)
911 #define GPIOD_BASE (IOPORT_BASE + 0x00000C00UL)
912 #define GPIOE_BASE (IOPORT_BASE + 0x00001000UL)
913 #define GPIOF_BASE (IOPORT_BASE + 0x00001400UL)
Dstm32g0b1xx.h750 #define IOPORT_BASE (0x50000000UL) /*!< IOPORT base address */ macro
864 #define GPIOA_BASE (IOPORT_BASE + 0x00000000UL)
865 #define GPIOB_BASE (IOPORT_BASE + 0x00000400UL)
866 #define GPIOC_BASE (IOPORT_BASE + 0x00000800UL)
867 #define GPIOD_BASE (IOPORT_BASE + 0x00000C00UL)
868 #define GPIOE_BASE (IOPORT_BASE + 0x00001000UL)
869 #define GPIOF_BASE (IOPORT_BASE + 0x00001400UL)
Dstm32g071xx.h639 #define IOPORT_BASE (0x50000000UL) /*!< IOPORT base address */ macro
724 #define GPIOA_BASE (IOPORT_BASE + 0x00000000UL)
725 #define GPIOB_BASE (IOPORT_BASE + 0x00000400UL)
726 #define GPIOC_BASE (IOPORT_BASE + 0x00000800UL)
727 #define GPIOD_BASE (IOPORT_BASE + 0x00000C00UL)
728 #define GPIOF_BASE (IOPORT_BASE + 0x00001400UL)
Dstm32g081xx.h681 #define IOPORT_BASE (0x50000000UL) /*!< IOPORT base address */ macro
768 #define GPIOA_BASE (IOPORT_BASE + 0x00000000UL)
769 #define GPIOB_BASE (IOPORT_BASE + 0x00000400UL)
770 #define GPIOC_BASE (IOPORT_BASE + 0x00000800UL)
771 #define GPIOD_BASE (IOPORT_BASE + 0x00000C00UL)
772 #define GPIOF_BASE (IOPORT_BASE + 0x00001400UL)
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/src/
Dstm32g0xx_hal_rcc.c95 #define RCC_GET_MCO_GPIO_PORT(__RCC_MCOx__) (IOPORT_BASE + ((0x00000400UL) * RCC_GET_MCO_GPIO_INDE…
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/src/
Dstm32wlxx_hal_rcc.c98 #define RCC_GET_MCO_GPIO_PORT(__RCC_MCOx__) (IOPORT_BASE + ((0x00000400UL) * RCC_GET_MCO_GPIO_INDE…
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/src/
Dstm32wbxx_hal_rcc.c101 #define RCC_GET_MCO_GPIO_PORT(__RCC_MCOx__) (IOPORT_BASE + ((0x00000400UL) * RCC_GET_MCO_GPIO_INDE…
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/
Dstm32u0xx_hal_rcc.c93 (((IOPORT_BASE) + ((0x00000400UL) * RCC_GET_MCO_GPIO_INDEX((__RCC_MCOx__)))))
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u083xx.h829 #define IOPORT_BASE (0x50000000UL) /*!< IOPORT base address */ macro
945 #define GPIOA_BASE (IOPORT_BASE + 0x0000UL)
946 #define GPIOB_BASE (IOPORT_BASE + 0x0400UL)
947 #define GPIOC_BASE (IOPORT_BASE + 0x0800UL)
948 #define GPIOD_BASE (IOPORT_BASE + 0x0C00UL)
949 #define GPIOE_BASE (IOPORT_BASE + 0x1000UL)
950 #define GPIOF_BASE (IOPORT_BASE + 0x1400UL)
Dstm32u073xx.h795 #define IOPORT_BASE (0x50000000UL) /*!< IOPORT base address */ macro
910 #define GPIOA_BASE (IOPORT_BASE + 0x0000UL)
911 #define GPIOB_BASE (IOPORT_BASE + 0x0400UL)
912 #define GPIOC_BASE (IOPORT_BASE + 0x0800UL)
913 #define GPIOD_BASE (IOPORT_BASE + 0x0C00UL)
914 #define GPIOE_BASE (IOPORT_BASE + 0x1000UL)
915 #define GPIOF_BASE (IOPORT_BASE + 0x1400UL)
Dstm32u031xx.h726 #define IOPORT_BASE (0x50000000UL) /*!< IOPORT base address */ macro
818 #define GPIOA_BASE (IOPORT_BASE + 0x0000UL)
819 #define GPIOB_BASE (IOPORT_BASE + 0x0400UL)
820 #define GPIOC_BASE (IOPORT_BASE + 0x0800UL)
821 #define GPIOD_BASE (IOPORT_BASE + 0x0C00UL)
822 #define GPIOF_BASE (IOPORT_BASE + 0x1400UL)
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb50xx.h837 #define IOPORT_BASE (AHB2PERIPH_BASE + 0x00000000UL) macro
838 #define GPIOA_BASE (IOPORT_BASE + 0x00000000UL)
839 #define GPIOB_BASE (IOPORT_BASE + 0x00000400UL)
840 #define GPIOC_BASE (IOPORT_BASE + 0x00000800UL)
841 #define GPIOE_BASE (IOPORT_BASE + 0x00001000UL)
842 #define GPIOH_BASE (IOPORT_BASE + 0x00001C00UL)
Dstm32wb1mxx.h856 #define IOPORT_BASE (AHB2PERIPH_BASE + 0x00000000UL) macro
857 #define GPIOA_BASE (IOPORT_BASE + 0x00000000UL)
858 #define GPIOB_BASE (IOPORT_BASE + 0x00000400UL)
859 #define GPIOC_BASE (IOPORT_BASE + 0x00000800UL)
860 #define GPIOE_BASE (IOPORT_BASE + 0x00001000UL)
861 #define GPIOH_BASE (IOPORT_BASE + 0x00001C00UL)

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