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Searched refs:FDCAN_IR_TEFF_Pos (Results 1 – 25 of 82) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g0b0xx.h2734 #define FDCAN_IR_TEFF_Pos (11U) macro
2735 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
Dstm32g0c1xx.h3811 #define FDCAN_IR_TEFF_Pos (11U) macro
3812 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
Dstm32g0b1xx.h3575 #define FDCAN_IR_TEFF_Pos (11U) macro
3576 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h4154 #define FDCAN_IR_TEFF_Pos (11U) macro
4155 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
Dstm32g411xc.h4266 #define FDCAN_IR_TEFF_Pos (11U) macro
4267 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
Dstm32g441xx.h4502 #define FDCAN_IR_TEFF_Pos (11U) macro
4503 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
Dstm32gbk1cb.h4267 #define FDCAN_IR_TEFF_Pos (11U) macro
4268 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
Dstm32g431xx.h4281 #define FDCAN_IR_TEFF_Pos (11U) macro
4282 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
Dstm32g4a1xx.h4660 #define FDCAN_IR_TEFF_Pos (11U) macro
4661 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
Dstm32g491xx.h4439 #define FDCAN_IR_TEFF_Pos (11U) macro
4440 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
Dstm32g473xx.h4598 #define FDCAN_IR_TEFF_Pos (11U) macro
4599 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
Dstm32g471xx.h4463 #define FDCAN_IR_TEFF_Pos (11U) macro
4464 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
Dstm32g483xx.h4819 #define FDCAN_IR_TEFF_Pos (11U) macro
4820 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
Dstm32g414xx.h4697 #define FDCAN_IR_TEFF_Pos (11U) macro
4698 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
Dstm32g474xx.h4731 #define FDCAN_IR_TEFF_Pos (11U) macro
4732 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
Dstm32g484xx.h4952 #define FDCAN_IR_TEFF_Pos (11U) macro
4953 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h5060 #define FDCAN_IR_TEFF_Pos (11U) macro
5061 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800…
Dstm32h523xx.h6644 #define FDCAN_IR_TEFF_Pos (11U) macro
6645 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800…
/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h6912 #define FDCAN_IR_TEFF_Pos (11U) macro
6913 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
Dstm32l562xx.h7244 #define FDCAN_IR_TEFF_Pos (11U) macro
7245 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h4178 #define FDCAN_IR_TEFF_Pos (14U) macro
4179 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00004000 */
Dstm32h7b0xx.h4313 #define FDCAN_IR_TEFF_Pos (14U) macro
4314 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00004000 */
Dstm32h7b0xxq.h4314 #define FDCAN_IR_TEFF_Pos (14U) macro
4315 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00004000 */
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h7532 #define FDCAN_IR_TEFF_Pos (11U) macro
7533 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800…
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h8409 #define FDCAN_IR_TEFF_Pos (11U) macro
8410 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */

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