Searched refs:DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Pos (Results 1 – 13 of 13) sorted by relevance
3263 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Pos (18U) macro3264 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Msk (0x1UL << DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Pos)…
3375 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Pos (18U) macro3376 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Msk (0x1UL << DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Pos)…
3611 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Pos (18U) macro3612 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Msk (0x1UL << DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Pos)…
3376 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Pos (18U) macro3377 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Msk (0x1UL << DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Pos)…
3390 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Pos (18U) macro3391 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Msk (0x1UL << DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Pos)…
3766 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Pos (18U) macro3767 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Msk (0x1UL << DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Pos)…
3545 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Pos (18U) macro3546 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Msk (0x1UL << DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Pos)…
3641 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Pos (18U) macro3642 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Msk (0x1UL << DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Pos)…
3560 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Pos (18U) macro3561 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Msk (0x1UL << DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Pos)…
3862 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Pos (18U) macro3863 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Msk (0x1UL << DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Pos)…
3740 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Pos (18U) macro3741 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Msk (0x1UL << DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Pos)…
3774 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Pos (18U) macro3775 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Msk (0x1UL << DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Pos)…
3995 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Pos (18U) macro3996 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Msk (0x1UL << DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG2_Pos)…
