Searched refs:DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Pos (Results 1 – 13 of 13) sorted by relevance
3257 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Pos (16U) macro3258 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Msk (0x1UL << DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Pos)…
3369 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Pos (16U) macro3370 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Msk (0x1UL << DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Pos)…
3605 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Pos (16U) macro3606 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Msk (0x1UL << DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Pos)…
3370 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Pos (16U) macro3371 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Msk (0x1UL << DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Pos)…
3384 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Pos (16U) macro3385 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Msk (0x1UL << DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Pos)…
3760 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Pos (16U) macro3761 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Msk (0x1UL << DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Pos)…
3539 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Pos (16U) macro3540 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Msk (0x1UL << DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Pos)…
3635 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Pos (16U) macro3636 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Msk (0x1UL << DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Pos)…
3554 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Pos (16U) macro3555 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Msk (0x1UL << DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Pos)…
3856 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Pos (16U) macro3857 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Msk (0x1UL << DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Pos)…
3734 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Pos (16U) macro3735 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Msk (0x1UL << DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Pos)…
3768 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Pos (16U) macro3769 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Msk (0x1UL << DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Pos)…
3989 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Pos (16U) macro3990 #define DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Msk (0x1UL << DMAMUX_IPHW_CFGR1_NUM_DMA_TRIG0_Pos)…
