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Searched refs:DMAMUX_CSR_SOF5_Pos (Results 1 – 25 of 97) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h1745 #define DMAMUX_CSR_SOF5_Pos (5U) macro
1746 #define DMAMUX_CSR_SOF5_Msk (0x1UL << DMAMUX_CSR_SOF5_Pos) /*!< 0x00000020 */
Dstm32g050xx.h1764 #define DMAMUX_CSR_SOF5_Pos (5U) macro
1765 #define DMAMUX_CSR_SOF5_Msk (0x1UL << DMAMUX_CSR_SOF5_Pos) /*!< 0x00000020 */
Dstm32g070xx.h1767 #define DMAMUX_CSR_SOF5_Pos (5U) macro
1768 #define DMAMUX_CSR_SOF5_Msk (0x1UL << DMAMUX_CSR_SOF5_Pos) /*!< 0x00000020 */
Dstm32g031xx.h1788 #define DMAMUX_CSR_SOF5_Pos (5U) macro
1789 #define DMAMUX_CSR_SOF5_Msk (0x1UL << DMAMUX_CSR_SOF5_Pos) /*!< 0x00000020 */
Dstm32g041xx.h2024 #define DMAMUX_CSR_SOF5_Pos (5U) macro
2025 #define DMAMUX_CSR_SOF5_Msk (0x1UL << DMAMUX_CSR_SOF5_Pos) /*!< 0x00000020 */
Dstm32g051xx.h2082 #define DMAMUX_CSR_SOF5_Pos (5U) macro
2083 #define DMAMUX_CSR_SOF5_Msk (0x1UL << DMAMUX_CSR_SOF5_Pos) /*!< 0x00000020 */
Dstm32g061xx.h2318 #define DMAMUX_CSR_SOF5_Pos (5U) macro
2319 #define DMAMUX_CSR_SOF5_Msk (0x1UL << DMAMUX_CSR_SOF5_Pos) /*!< 0x00000020 */
Dstm32g071xx.h2268 #define DMAMUX_CSR_SOF5_Pos (5U) macro
2269 #define DMAMUX_CSR_SOF5_Msk (0x1UL << DMAMUX_CSR_SOF5_Pos) /*!< 0x00000020 */
Dstm32g081xx.h2504 #define DMAMUX_CSR_SOF5_Pos (5U) macro
2505 #define DMAMUX_CSR_SOF5_Msk (0x1UL << DMAMUX_CSR_SOF5_Pos) /*!< 0x00000020 */
Dstm32g0b0xx.h1849 #define DMAMUX_CSR_SOF5_Pos (5U) macro
1850 #define DMAMUX_CSR_SOF5_Msk (0x1UL << DMAMUX_CSR_SOF5_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h3062 #define DMAMUX_CSR_SOF5_Pos (5U) macro
3063 #define DMAMUX_CSR_SOF5_Msk (0x1UL << DMAMUX_CSR_SOF5_Pos) /*!< 0x00000020 */
Dstm32wle5xx.h3062 #define DMAMUX_CSR_SOF5_Pos (5U) macro
3063 #define DMAMUX_CSR_SOF5_Msk (0x1UL << DMAMUX_CSR_SOF5_Pos) /*!< 0x00000020 */
Dstm32wl5mxx.h3256 #define DMAMUX_CSR_SOF5_Pos (5U) macro
3257 #define DMAMUX_CSR_SOF5_Msk (0x1UL << DMAMUX_CSR_SOF5_Pos) /*!< 0x00000020 */
Dstm32wl54xx.h3256 #define DMAMUX_CSR_SOF5_Pos (5U) macro
3257 #define DMAMUX_CSR_SOF5_Msk (0x1UL << DMAMUX_CSR_SOF5_Pos) /*!< 0x00000020 */
Dstm32wl55xx.h3256 #define DMAMUX_CSR_SOF5_Pos (5U) macro
3257 #define DMAMUX_CSR_SOF5_Msk (0x1UL << DMAMUX_CSR_SOF5_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h2139 #define DMAMUX_CSR_SOF5_Pos (5U) macro
2140 #define DMAMUX_CSR_SOF5_Msk (0x1UL << DMAMUX_CSR_SOF5_Pos) /*!< 0x00000020…
Dstm32u083xx.h2612 #define DMAMUX_CSR_SOF5_Pos (5U) macro
2613 #define DMAMUX_CSR_SOF5_Msk (0x1UL << DMAMUX_CSR_SOF5_Pos) /*!< 0x00000020…
Dstm32u073xx.h2354 #define DMAMUX_CSR_SOF5_Pos (5U) macro
2355 #define DMAMUX_CSR_SOF5_Msk (0x1UL << DMAMUX_CSR_SOF5_Pos) /*!< 0x00000020…
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb50xx.h2552 #define DMAMUX_CSR_SOF5_Pos (5U) macro
2553 #define DMAMUX_CSR_SOF5_Msk (0x1UL << DMAMUX_CSR_SOF5_Pos) /*!< 0x00000020 */
Dstm32wb1mxx.h2157 #define DMAMUX_CSR_SOF5_Pos (5U) macro
2158 #define DMAMUX_CSR_SOF5_Msk (0x1UL << DMAMUX_CSR_SOF5_Pos) /*!< 0x00000020 */
Dstm32wb30xx.h2551 #define DMAMUX_CSR_SOF5_Pos (5U) macro
2552 #define DMAMUX_CSR_SOF5_Msk (0x1UL << DMAMUX_CSR_SOF5_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h2085 #define DMAMUX_CSR_SOF5_Pos (5U) macro
2086 #define DMAMUX_CSR_SOF5_Msk (0x1UL << DMAMUX_CSR_SOF5_Pos) /*!< 0x00000020 */
Dstm32wb15xx.h2157 #define DMAMUX_CSR_SOF5_Pos (5U) macro
2158 #define DMAMUX_CSR_SOF5_Msk (0x1UL << DMAMUX_CSR_SOF5_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h3061 #define DMAMUX_CSR_SOF5_Pos (5U) macro
3062 #define DMAMUX_CSR_SOF5_Msk (0x1UL << DMAMUX_CSR_SOF5_Pos)/*!< 0x00000020 …
Dstm32g411xc.h3149 #define DMAMUX_CSR_SOF5_Pos (5U) macro
3150 #define DMAMUX_CSR_SOF5_Msk (0x1UL << DMAMUX_CSR_SOF5_Pos)/*!< 0x00000020 …

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