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Searched refs:DMAMUX_CSR_SOF3_Pos (Results 1 – 25 of 98) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c071xx.h1895 #define DMAMUX_CSR_SOF3_Pos (3U) macro
1896 #define DMAMUX_CSR_SOF3_Msk (0x1UL << DMAMUX_CSR_SOF3_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h1739 #define DMAMUX_CSR_SOF3_Pos (3U) macro
1740 #define DMAMUX_CSR_SOF3_Msk (0x1UL << DMAMUX_CSR_SOF3_Pos) /*!< 0x00000008 */
Dstm32g050xx.h1758 #define DMAMUX_CSR_SOF3_Pos (3U) macro
1759 #define DMAMUX_CSR_SOF3_Msk (0x1UL << DMAMUX_CSR_SOF3_Pos) /*!< 0x00000008 */
Dstm32g070xx.h1761 #define DMAMUX_CSR_SOF3_Pos (3U) macro
1762 #define DMAMUX_CSR_SOF3_Msk (0x1UL << DMAMUX_CSR_SOF3_Pos) /*!< 0x00000008 */
Dstm32g031xx.h1782 #define DMAMUX_CSR_SOF3_Pos (3U) macro
1783 #define DMAMUX_CSR_SOF3_Msk (0x1UL << DMAMUX_CSR_SOF3_Pos) /*!< 0x00000008 */
Dstm32g041xx.h2018 #define DMAMUX_CSR_SOF3_Pos (3U) macro
2019 #define DMAMUX_CSR_SOF3_Msk (0x1UL << DMAMUX_CSR_SOF3_Pos) /*!< 0x00000008 */
Dstm32g051xx.h2076 #define DMAMUX_CSR_SOF3_Pos (3U) macro
2077 #define DMAMUX_CSR_SOF3_Msk (0x1UL << DMAMUX_CSR_SOF3_Pos) /*!< 0x00000008 */
Dstm32g061xx.h2312 #define DMAMUX_CSR_SOF3_Pos (3U) macro
2313 #define DMAMUX_CSR_SOF3_Msk (0x1UL << DMAMUX_CSR_SOF3_Pos) /*!< 0x00000008 */
Dstm32g071xx.h2262 #define DMAMUX_CSR_SOF3_Pos (3U) macro
2263 #define DMAMUX_CSR_SOF3_Msk (0x1UL << DMAMUX_CSR_SOF3_Pos) /*!< 0x00000008 */
Dstm32g081xx.h2498 #define DMAMUX_CSR_SOF3_Pos (3U) macro
2499 #define DMAMUX_CSR_SOF3_Msk (0x1UL << DMAMUX_CSR_SOF3_Pos) /*!< 0x00000008 */
Dstm32g0b0xx.h1843 #define DMAMUX_CSR_SOF3_Pos (3U) macro
1844 #define DMAMUX_CSR_SOF3_Msk (0x1UL << DMAMUX_CSR_SOF3_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h3056 #define DMAMUX_CSR_SOF3_Pos (3U) macro
3057 #define DMAMUX_CSR_SOF3_Msk (0x1UL << DMAMUX_CSR_SOF3_Pos) /*!< 0x00000008 */
Dstm32wle5xx.h3056 #define DMAMUX_CSR_SOF3_Pos (3U) macro
3057 #define DMAMUX_CSR_SOF3_Msk (0x1UL << DMAMUX_CSR_SOF3_Pos) /*!< 0x00000008 */
Dstm32wl5mxx.h3250 #define DMAMUX_CSR_SOF3_Pos (3U) macro
3251 #define DMAMUX_CSR_SOF3_Msk (0x1UL << DMAMUX_CSR_SOF3_Pos) /*!< 0x00000008 */
Dstm32wl54xx.h3250 #define DMAMUX_CSR_SOF3_Pos (3U) macro
3251 #define DMAMUX_CSR_SOF3_Msk (0x1UL << DMAMUX_CSR_SOF3_Pos) /*!< 0x00000008 */
Dstm32wl55xx.h3250 #define DMAMUX_CSR_SOF3_Pos (3U) macro
3251 #define DMAMUX_CSR_SOF3_Msk (0x1UL << DMAMUX_CSR_SOF3_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h2133 #define DMAMUX_CSR_SOF3_Pos (3U) macro
2134 #define DMAMUX_CSR_SOF3_Msk (0x1UL << DMAMUX_CSR_SOF3_Pos) /*!< 0x00000008…
Dstm32u083xx.h2606 #define DMAMUX_CSR_SOF3_Pos (3U) macro
2607 #define DMAMUX_CSR_SOF3_Msk (0x1UL << DMAMUX_CSR_SOF3_Pos) /*!< 0x00000008…
Dstm32u073xx.h2348 #define DMAMUX_CSR_SOF3_Pos (3U) macro
2349 #define DMAMUX_CSR_SOF3_Msk (0x1UL << DMAMUX_CSR_SOF3_Pos) /*!< 0x00000008…
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb50xx.h2546 #define DMAMUX_CSR_SOF3_Pos (3U) macro
2547 #define DMAMUX_CSR_SOF3_Msk (0x1UL << DMAMUX_CSR_SOF3_Pos) /*!< 0x00000008 */
Dstm32wb1mxx.h2151 #define DMAMUX_CSR_SOF3_Pos (3U) macro
2152 #define DMAMUX_CSR_SOF3_Msk (0x1UL << DMAMUX_CSR_SOF3_Pos) /*!< 0x00000008 */
Dstm32wb30xx.h2545 #define DMAMUX_CSR_SOF3_Pos (3U) macro
2546 #define DMAMUX_CSR_SOF3_Msk (0x1UL << DMAMUX_CSR_SOF3_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h2079 #define DMAMUX_CSR_SOF3_Pos (3U) macro
2080 #define DMAMUX_CSR_SOF3_Msk (0x1UL << DMAMUX_CSR_SOF3_Pos) /*!< 0x00000008 */
Dstm32wb15xx.h2151 #define DMAMUX_CSR_SOF3_Pos (3U) macro
2152 #define DMAMUX_CSR_SOF3_Msk (0x1UL << DMAMUX_CSR_SOF3_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h3055 #define DMAMUX_CSR_SOF3_Pos (3U) macro
3056 #define DMAMUX_CSR_SOF3_Msk (0x1UL << DMAMUX_CSR_SOF3_Pos)/*!< 0x00000008 …

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