Home
last modified time | relevance | path

Searched refs:DMAMUX_CSR_SOF1_Pos (Results 1 – 25 of 100) sorted by relevance

1234

/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h1658 #define DMAMUX_CSR_SOF1_Pos (1U) macro
1659 #define DMAMUX_CSR_SOF1_Msk (0x1UL << DMAMUX_CSR_SOF1_Pos) /*!< 0x00000002 */
Dstm32c031xx.h1662 #define DMAMUX_CSR_SOF1_Pos (1U) macro
1663 #define DMAMUX_CSR_SOF1_Msk (0x1UL << DMAMUX_CSR_SOF1_Pos) /*!< 0x00000002 */
Dstm32c071xx.h1889 #define DMAMUX_CSR_SOF1_Pos (1U) macro
1890 #define DMAMUX_CSR_SOF1_Msk (0x1UL << DMAMUX_CSR_SOF1_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h1733 #define DMAMUX_CSR_SOF1_Pos (1U) macro
1734 #define DMAMUX_CSR_SOF1_Msk (0x1UL << DMAMUX_CSR_SOF1_Pos) /*!< 0x00000002 */
Dstm32g050xx.h1752 #define DMAMUX_CSR_SOF1_Pos (1U) macro
1753 #define DMAMUX_CSR_SOF1_Msk (0x1UL << DMAMUX_CSR_SOF1_Pos) /*!< 0x00000002 */
Dstm32g070xx.h1755 #define DMAMUX_CSR_SOF1_Pos (1U) macro
1756 #define DMAMUX_CSR_SOF1_Msk (0x1UL << DMAMUX_CSR_SOF1_Pos) /*!< 0x00000002 */
Dstm32g031xx.h1776 #define DMAMUX_CSR_SOF1_Pos (1U) macro
1777 #define DMAMUX_CSR_SOF1_Msk (0x1UL << DMAMUX_CSR_SOF1_Pos) /*!< 0x00000002 */
Dstm32g041xx.h2012 #define DMAMUX_CSR_SOF1_Pos (1U) macro
2013 #define DMAMUX_CSR_SOF1_Msk (0x1UL << DMAMUX_CSR_SOF1_Pos) /*!< 0x00000002 */
Dstm32g051xx.h2070 #define DMAMUX_CSR_SOF1_Pos (1U) macro
2071 #define DMAMUX_CSR_SOF1_Msk (0x1UL << DMAMUX_CSR_SOF1_Pos) /*!< 0x00000002 */
Dstm32g061xx.h2306 #define DMAMUX_CSR_SOF1_Pos (1U) macro
2307 #define DMAMUX_CSR_SOF1_Msk (0x1UL << DMAMUX_CSR_SOF1_Pos) /*!< 0x00000002 */
Dstm32g071xx.h2256 #define DMAMUX_CSR_SOF1_Pos (1U) macro
2257 #define DMAMUX_CSR_SOF1_Msk (0x1UL << DMAMUX_CSR_SOF1_Pos) /*!< 0x00000002 */
Dstm32g081xx.h2492 #define DMAMUX_CSR_SOF1_Pos (1U) macro
2493 #define DMAMUX_CSR_SOF1_Msk (0x1UL << DMAMUX_CSR_SOF1_Pos) /*!< 0x00000002 */
Dstm32g0b0xx.h1837 #define DMAMUX_CSR_SOF1_Pos (1U) macro
1838 #define DMAMUX_CSR_SOF1_Msk (0x1UL << DMAMUX_CSR_SOF1_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h3050 #define DMAMUX_CSR_SOF1_Pos (1U) macro
3051 #define DMAMUX_CSR_SOF1_Msk (0x1UL << DMAMUX_CSR_SOF1_Pos) /*!< 0x00000002 */
Dstm32wle5xx.h3050 #define DMAMUX_CSR_SOF1_Pos (1U) macro
3051 #define DMAMUX_CSR_SOF1_Msk (0x1UL << DMAMUX_CSR_SOF1_Pos) /*!< 0x00000002 */
Dstm32wl5mxx.h3244 #define DMAMUX_CSR_SOF1_Pos (1U) macro
3245 #define DMAMUX_CSR_SOF1_Msk (0x1UL << DMAMUX_CSR_SOF1_Pos) /*!< 0x00000002 */
Dstm32wl54xx.h3244 #define DMAMUX_CSR_SOF1_Pos (1U) macro
3245 #define DMAMUX_CSR_SOF1_Msk (0x1UL << DMAMUX_CSR_SOF1_Pos) /*!< 0x00000002 */
Dstm32wl55xx.h3244 #define DMAMUX_CSR_SOF1_Pos (1U) macro
3245 #define DMAMUX_CSR_SOF1_Msk (0x1UL << DMAMUX_CSR_SOF1_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h2127 #define DMAMUX_CSR_SOF1_Pos (1U) macro
2128 #define DMAMUX_CSR_SOF1_Msk (0x1UL << DMAMUX_CSR_SOF1_Pos) /*!< 0x00000002…
Dstm32u083xx.h2600 #define DMAMUX_CSR_SOF1_Pos (1U) macro
2601 #define DMAMUX_CSR_SOF1_Msk (0x1UL << DMAMUX_CSR_SOF1_Pos) /*!< 0x00000002…
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb50xx.h2540 #define DMAMUX_CSR_SOF1_Pos (1U) macro
2541 #define DMAMUX_CSR_SOF1_Msk (0x1UL << DMAMUX_CSR_SOF1_Pos) /*!< 0x00000002 */
Dstm32wb1mxx.h2145 #define DMAMUX_CSR_SOF1_Pos (1U) macro
2146 #define DMAMUX_CSR_SOF1_Msk (0x1UL << DMAMUX_CSR_SOF1_Pos) /*!< 0x00000002 */
Dstm32wb30xx.h2539 #define DMAMUX_CSR_SOF1_Pos (1U) macro
2540 #define DMAMUX_CSR_SOF1_Msk (0x1UL << DMAMUX_CSR_SOF1_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h2073 #define DMAMUX_CSR_SOF1_Pos (1U) macro
2074 #define DMAMUX_CSR_SOF1_Msk (0x1UL << DMAMUX_CSR_SOF1_Pos) /*!< 0x00000002 */
Dstm32wb15xx.h2145 #define DMAMUX_CSR_SOF1_Pos (1U) macro
2146 #define DMAMUX_CSR_SOF1_Msk (0x1UL << DMAMUX_CSR_SOF1_Pos) /*!< 0x00000002 */

1234