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Searched refs:DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos (Results 1 – 25 of 47) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h2727 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos (2U) macro
2728 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos)/*!< 0x0…
Dstm32g411xc.h2764 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos (2U) macro
2765 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos)/*!< 0x0…
Dstm32g441xx.h3072 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos (2U) macro
3073 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos)/*!< 0x0…
Dstm32gbk1cb.h2837 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos (2U) macro
2838 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos)/*!< 0x0…
Dstm32g431xx.h2851 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos (2U) macro
2852 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos)/*!< 0x0…
Dstm32g4a1xx.h3152 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos (2U) macro
3153 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos)/*!< 0x0…
Dstm32g491xx.h2931 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos (2U) macro
2932 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos)/*!< 0x0…
Dstm32g473xx.h3020 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos (2U) macro
3021 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos)/*!< 0x0…
Dstm32g471xx.h2942 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos (2U) macro
2943 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos)/*!< 0x0…
Dstm32g483xx.h3241 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos (2U) macro
3242 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos)/*!< 0x0…
Dstm32g414xx.h3126 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos (2U) macro
3127 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos)/*!< 0x0…
Dstm32g474xx.h3150 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos (2U) macro
3151 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos)/*!< 0x0…
Dstm32g484xx.h3371 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos (2U) macro
3372 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos)/*!< 0x0…
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l471xx.h16174 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos (2U) macro
16175 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos) /*!< 0x…
Dstm32l475xx.h16338 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos (2U) macro
16339 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos) /*!< 0x…
Dstm32l476xx.h16495 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos (2U) macro
16496 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos) /*!< 0x…
Dstm32l486xx.h16714 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos (2U) macro
16715 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos) /*!< 0x…
Dstm32l485xx.h16563 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos (2U) macro
16564 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos) /*!< 0x…
Dstm32l4a6xx.h18061 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos (2U) macro
18062 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos) /*!< 0x…
Dstm32l496xx.h17721 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos (2U) macro
17722 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos) /*!< 0x…
Dstm32l4r5xx.h18095 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos (2U) macro
18096 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos) /*!< 0x…
Dstm32l4r7xx.h18594 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos (2U) macro
18595 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos) /*!< 0x…
Dstm32l4s5xx.h18442 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos (2U) macro
18443 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos) /*!< 0x…
/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h4534 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos (2U) macro
4535 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos)/*!< 0x0…
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h4533 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos (2U) macro
4534 #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos)

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