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Searched refs:Channel (Results 1 – 25 of 384) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_dma.h1004 __STATIC_INLINE void LL_DMA_EnableChannel(const DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_EnableChannel() argument
1007 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_EN); in LL_DMA_EnableChannel()
1026 __STATIC_INLINE void LL_DMA_DisableChannel(const DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_DisableChannel() argument
1029 SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, in LL_DMA_DisableChannel()
1049 __STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(const DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_IsEnabledChannel() argument
1052 …return ((READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, D… in LL_DMA_IsEnabledChannel()
1072 __STATIC_INLINE void LL_DMA_ResetChannel(const DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_ResetChannel() argument
1075 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_RES… in LL_DMA_ResetChannel()
1094 __STATIC_INLINE void LL_DMA_SuspendChannel(const DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_SuspendChannel() argument
1097 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_SUS… in LL_DMA_SuspendChannel()
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/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_dma.h1643 __STATIC_INLINE void LL_DMA_EnableChannel(const DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_EnableChannel() argument
1646 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_EN); in LL_DMA_EnableChannel()
1665 __STATIC_INLINE void LL_DMA_DisableChannel(const DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_DisableChannel() argument
1668 SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, in LL_DMA_DisableChannel()
1688 __STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(const DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_IsEnabledChannel() argument
1691 …return ((READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, D… in LL_DMA_IsEnabledChannel()
1711 __STATIC_INLINE void LL_DMA_ResetChannel(const DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_ResetChannel() argument
1714 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_RES… in LL_DMA_ResetChannel()
1733 __STATIC_INLINE void LL_DMA_SuspendChannel(const DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_SuspendChannel() argument
1736 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_SUS… in LL_DMA_SuspendChannel()
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/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_dma.h1426 __STATIC_INLINE void LL_DMA_EnableChannel(const DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_EnableChannel() argument
1429 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_EN); in LL_DMA_EnableChannel()
1456 __STATIC_INLINE void LL_DMA_DisableChannel(const DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_DisableChannel() argument
1459 SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, in LL_DMA_DisableChannel()
1487 __STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(const DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_IsEnabledChannel() argument
1490 …return ((READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, D… in LL_DMA_IsEnabledChannel()
1518 __STATIC_INLINE void LL_DMA_ResetChannel(const DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_ResetChannel() argument
1521 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_RES… in LL_DMA_ResetChannel()
1548 __STATIC_INLINE void LL_DMA_SuspendChannel(const DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_SuspendChannel() argument
1551 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_SUS… in LL_DMA_SuspendChannel()
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/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_dma.h1819 __STATIC_INLINE void LL_DMA_EnableChannel(const DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_EnableChannel() argument
1822 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_EN); in LL_DMA_EnableChannel()
1849 __STATIC_INLINE void LL_DMA_DisableChannel(const DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_DisableChannel() argument
1852 SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, in LL_DMA_DisableChannel()
1880 __STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(const DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_IsEnabledChannel() argument
1883 …return ((READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, D… in LL_DMA_IsEnabledChannel()
1911 __STATIC_INLINE void LL_DMA_ResetChannel(const DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_ResetChannel() argument
1914 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_RES… in LL_DMA_ResetChannel()
1941 __STATIC_INLINE void LL_DMA_SuspendChannel(const DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_SuspendChannel() argument
1944 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_SUS… in LL_DMA_SuspendChannel()
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/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_dma.h1397 __STATIC_INLINE void LL_DMA_EnableChannel(const DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_EnableChannel() argument
1400 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_EN); in LL_DMA_EnableChannel()
1427 __STATIC_INLINE void LL_DMA_DisableChannel(const DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_DisableChannel() argument
1430 SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, in LL_DMA_DisableChannel()
1458 __STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(const DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_IsEnabledChannel() argument
1461 …return ((READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, D… in LL_DMA_IsEnabledChannel()
1489 __STATIC_INLINE void LL_DMA_ResetChannel(const DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_ResetChannel() argument
1492 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_RES… in LL_DMA_ResetChannel()
1519 __STATIC_INLINE void LL_DMA_SuspendChannel(const DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_SuspendChannel() argument
1522 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_SUS… in LL_DMA_SuspendChannel()
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/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_mdma.h691 __STATIC_INLINE void LL_MDMA_EnableChannel(const MDMA_TypeDef *MDMAx, uint32_t Channel) in LL_MDMA_EnableChannel() argument
695 …SET_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR… in LL_MDMA_EnableChannel()
721 __STATIC_INLINE void LL_MDMA_DisableChannel(const MDMA_TypeDef *MDMAx, uint32_t Channel) in LL_MDMA_DisableChannel() argument
725 …CLEAR_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_C… in LL_MDMA_DisableChannel()
751 __STATIC_INLINE uint32_t LL_MDMA_IsEnabledChannel(const MDMA_TypeDef *MDMAx, uint32_t Channel) in LL_MDMA_IsEnabledChannel() argument
755 …return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR,… in LL_MDMA_IsEnabledChannel()
781 __STATIC_INLINE void LL_MDMA_GenerateSWRequest(const MDMA_TypeDef *MDMAx, uint32_t Channel) in LL_MDMA_GenerateSWRequest() argument
785 …SET_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR… in LL_MDMA_GenerateSWRequest()
817 __STATIC_INLINE void LL_MDMA_ConfigXferEndianness(const MDMA_TypeDef *MDMAx, uint32_t Channel, uint… in LL_MDMA_ConfigXferEndianness() argument
821 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, in LL_MDMA_ConfigXferEndianness()
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Dstm32h7xx_ll_bdma.h502 __STATIC_INLINE void LL_BDMA_EnableChannel(const BDMA_TypeDef *BDMAx, uint32_t Channel) in LL_BDMA_EnableChannel() argument
506 …SET_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_CCR… in LL_BDMA_EnableChannel()
524 __STATIC_INLINE void LL_BDMA_DisableChannel(const BDMA_TypeDef *BDMAx, uint32_t Channel) in LL_BDMA_DisableChannel() argument
528 …CLEAR_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, BDMA_C… in LL_BDMA_DisableChannel()
546 __STATIC_INLINE uint32_t LL_BDMA_IsEnabledChannel(const BDMA_TypeDef *BDMAx, uint32_t Channel) in LL_BDMA_IsEnabledChannel() argument
550 …return ((READ_BIT(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR… in LL_BDMA_IsEnabledChannel()
587 __STATIC_INLINE void LL_BDMA_ConfigTransfer(const BDMA_TypeDef *BDMAx, uint32_t Channel, uint32_t C… in LL_BDMA_ConfigTransfer() argument
591 MODIFY_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, in LL_BDMA_ConfigTransfer()
616 __STATIC_INLINE void LL_BDMA_SetDataTransferDirection(const BDMA_TypeDef *BDMAx, uint32_t Channel, … in LL_BDMA_SetDataTransferDirection() argument
620 MODIFY_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CCR, in LL_BDMA_SetDataTransferDirection()
[all …]
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_ll_dma.c68 #define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, Channel) ((((INSTANCE) == HPDMA1) &… argument
69 … (((Channel) == LL_DMA_CHANNEL_0) || \
70 … ((Channel) == LL_DMA_CHANNEL_1) || \
71 … ((Channel) == LL_DMA_CHANNEL_2) || \
72 … ((Channel) == LL_DMA_CHANNEL_3) || \
73 … ((Channel) == LL_DMA_CHANNEL_4) || \
74 … ((Channel) == LL_DMA_CHANNEL_5) || \
75 … ((Channel) == LL_DMA_CHANNEL_6) || \
76 … ((Channel) == LL_DMA_CHANNEL_7) || \
77 … ((Channel) == LL_DMA_CHANNEL_8) || \
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Dstm32n6xx_hal_lptim.c583 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Channel) in HAL_LPTIM_PWM_Start() argument
586 assert_param(IS_LPTIM_CCX_INSTANCE(hlptim->Instance, Channel)); in HAL_LPTIM_PWM_Start()
589 if (LPTIM_CHANNEL_STATE_GET(hlptim, Channel) != HAL_LPTIM_CHANNEL_STATE_READY) in HAL_LPTIM_PWM_Start()
598 LPTIM_CHANNEL_STATE_SET(hlptim, Channel, HAL_LPTIM_CHANNEL_STATE_BUSY); in HAL_LPTIM_PWM_Start()
607 __HAL_LPTIM_CAPTURE_COMPARE_ENABLE(hlptim, Channel); in HAL_LPTIM_PWM_Start()
628 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim, uint32_t Channel) in HAL_LPTIM_PWM_Stop() argument
631 assert_param(IS_LPTIM_CCX_INSTANCE(hlptim->Instance, Channel)); in HAL_LPTIM_PWM_Stop()
637 __HAL_LPTIM_CAPTURE_COMPARE_DISABLE(hlptim, Channel); in HAL_LPTIM_PWM_Stop()
643 LPTIM_CHANNEL_STATE_SET(hlptim, Channel, HAL_LPTIM_CHANNEL_STATE_READY); in HAL_LPTIM_PWM_Stop()
661 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel) in HAL_LPTIM_PWM_Start_IT() argument
[all …]
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_ll_dma.c68 #define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, Channel) ((((INSTANCE) == HPDMA1) &… argument
69 … (((Channel) == LL_DMA_CHANNEL_0) || \
70 … ((Channel) == LL_DMA_CHANNEL_1) || \
71 … ((Channel) == LL_DMA_CHANNEL_2) || \
72 … ((Channel) == LL_DMA_CHANNEL_3) || \
73 … ((Channel) == LL_DMA_CHANNEL_4) || \
74 … ((Channel) == LL_DMA_CHANNEL_5) || \
75 … ((Channel) == LL_DMA_CHANNEL_6) || \
76 … ((Channel) == LL_DMA_CHANNEL_7) || \
77 … ((Channel) == LL_DMA_CHANNEL_8) || \
[all …]
Dstm32h7rsxx_hal_lptim.c583 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Channel) in HAL_LPTIM_PWM_Start() argument
586 assert_param(IS_LPTIM_CCX_INSTANCE(hlptim->Instance, Channel)); in HAL_LPTIM_PWM_Start()
589 if (LPTIM_CHANNEL_STATE_GET(hlptim, Channel) != HAL_LPTIM_CHANNEL_STATE_READY) in HAL_LPTIM_PWM_Start()
598 LPTIM_CHANNEL_STATE_SET(hlptim, Channel, HAL_LPTIM_CHANNEL_STATE_BUSY); in HAL_LPTIM_PWM_Start()
607 __HAL_LPTIM_CAPTURE_COMPARE_ENABLE(hlptim, Channel); in HAL_LPTIM_PWM_Start()
628 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim, uint32_t Channel) in HAL_LPTIM_PWM_Stop() argument
631 assert_param(IS_LPTIM_CCX_INSTANCE(hlptim->Instance, Channel)); in HAL_LPTIM_PWM_Stop()
637 __HAL_LPTIM_CAPTURE_COMPARE_DISABLE(hlptim, Channel); in HAL_LPTIM_PWM_Stop()
643 LPTIM_CHANNEL_STATE_SET(hlptim, Channel, HAL_LPTIM_CHANNEL_STATE_READY); in HAL_LPTIM_PWM_Stop()
661 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel) in HAL_LPTIM_PWM_Start_IT() argument
[all …]
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_dma.h509 __STATIC_INLINE void LL_DMA_EnableChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_EnableChannel() argument
512 SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_EN); in LL_DMA_EnableChannel()
530 __STATIC_INLINE void LL_DMA_DisableChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_DisableChannel() argument
533 …CLEAR_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_EN); in LL_DMA_DisableChannel()
551 __STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_IsEnabledChannel() argument
554 return ((READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, in LL_DMA_IsEnabledChannel()
581 __STATIC_INLINE void LL_DMA_ConfigChannelSecure(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Confi… in LL_DMA_ConfigChannelSecure() argument
584 …MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + (uint32_t)(CHANNEL_OFFSET_TAB[Channel & 0x07U]… in LL_DMA_ConfigChannelSecure()
609 __STATIC_INLINE uint32_t LL_DMA_GetConfigChannelSecure(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_GetConfigChannelSecure() argument
612 return (READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, in LL_DMA_GetConfigChannelSecure()
[all …]
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_dma.h485 __STATIC_INLINE void LL_DMA_EnableChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_EnableChannel() argument
488 SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_EN); in LL_DMA_EnableChannel()
505 __STATIC_INLINE void LL_DMA_DisableChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_DisableChannel() argument
508 …CLEAR_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_EN); in LL_DMA_DisableChannel()
525 __STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_IsEnabledChannel() argument
528 return ((READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, in LL_DMA_IsEnabledChannel()
554 __STATIC_INLINE void LL_DMA_ConfigChannelSecure(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Confi… in LL_DMA_ConfigChannelSecure() argument
557 …MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + (uint32_t)(CHANNEL_OFFSET_TAB[Channel])))->CCR, in LL_DMA_ConfigChannelSecure()
581 __STATIC_INLINE uint32_t LL_DMA_GetConfigChannelSecure(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_GetConfigChannelSecure() argument
584 return (READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, in LL_DMA_GetConfigChannelSecure()
[all …]
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_ll_dma.c68 #define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, Channel) ((((INSTANCE) == GPDMA1) &… argument
69 … (((Channel) == LL_DMA_CHANNEL_0) || \
70 … ((Channel) == LL_DMA_CHANNEL_1) || \
71 … ((Channel) == LL_DMA_CHANNEL_2) || \
72 … ((Channel) == LL_DMA_CHANNEL_3) || \
73 … ((Channel) == LL_DMA_CHANNEL_4) || \
74 … ((Channel) == LL_DMA_CHANNEL_5) || \
75 … ((Channel) == LL_DMA_CHANNEL_6) || \
76 … ((Channel) == LL_DMA_CHANNEL_7) || \
77 … ((Channel) == LL_DMA_CHANNEL_ALL))) || \
[all …]
Dstm32h5xx_hal_lptim.c562 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Channel) in HAL_LPTIM_PWM_Start() argument
565 assert_param(IS_LPTIM_CCX_INSTANCE(hlptim->Instance, Channel)); in HAL_LPTIM_PWM_Start()
568 if (LPTIM_CHANNEL_STATE_GET(hlptim, Channel) != HAL_LPTIM_CHANNEL_STATE_READY) in HAL_LPTIM_PWM_Start()
577 LPTIM_CHANNEL_STATE_SET(hlptim, Channel, HAL_LPTIM_CHANNEL_STATE_BUSY); in HAL_LPTIM_PWM_Start()
586 __HAL_LPTIM_CAPTURE_COMPARE_ENABLE(hlptim, Channel); in HAL_LPTIM_PWM_Start()
607 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim, uint32_t Channel) in HAL_LPTIM_PWM_Stop() argument
610 assert_param(IS_LPTIM_CCX_INSTANCE(hlptim->Instance, Channel)); in HAL_LPTIM_PWM_Stop()
616 __HAL_LPTIM_CAPTURE_COMPARE_DISABLE(hlptim, Channel); in HAL_LPTIM_PWM_Stop()
622 LPTIM_CHANNEL_STATE_SET(hlptim, Channel, HAL_LPTIM_CHANNEL_STATE_READY); in HAL_LPTIM_PWM_Stop()
640 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel) in HAL_LPTIM_PWM_Start_IT() argument
[all …]
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_ll_dma.c68 #define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, Channel) ((((INSTANCE) == GPDMA1) &… argument
69 … (((Channel) == LL_DMA_CHANNEL_0) || \
70 … ((Channel) == LL_DMA_CHANNEL_1) || \
71 … ((Channel) == LL_DMA_CHANNEL_2) || \
72 … ((Channel) == LL_DMA_CHANNEL_3) || \
73 … ((Channel) == LL_DMA_CHANNEL_4) || \
74 … ((Channel) == LL_DMA_CHANNEL_5) || \
75 … ((Channel) == LL_DMA_CHANNEL_6) || \
76 … ((Channel) == LL_DMA_CHANNEL_7) || \
77 … ((Channel) == LL_DMA_CHANNEL_8) || \
[all …]
Dstm32u5xx_hal_lptim.c565 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Channel) in HAL_LPTIM_PWM_Start() argument
568 assert_param(IS_LPTIM_CCX_INSTANCE(hlptim->Instance, Channel)); in HAL_LPTIM_PWM_Start()
571 if (LPTIM_CHANNEL_STATE_GET(hlptim, Channel) != HAL_LPTIM_CHANNEL_STATE_READY) in HAL_LPTIM_PWM_Start()
580 LPTIM_CHANNEL_STATE_SET(hlptim, Channel, HAL_LPTIM_CHANNEL_STATE_BUSY); in HAL_LPTIM_PWM_Start()
589 __HAL_LPTIM_CAPTURE_COMPARE_ENABLE(hlptim, Channel); in HAL_LPTIM_PWM_Start()
610 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim, uint32_t Channel) in HAL_LPTIM_PWM_Stop() argument
613 assert_param(IS_LPTIM_CCX_INSTANCE(hlptim->Instance, Channel)); in HAL_LPTIM_PWM_Stop()
619 __HAL_LPTIM_CAPTURE_COMPARE_DISABLE(hlptim, Channel); in HAL_LPTIM_PWM_Stop()
625 LPTIM_CHANNEL_STATE_SET(hlptim, Channel, HAL_LPTIM_CHANNEL_STATE_READY); in HAL_LPTIM_PWM_Stop()
643 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel) in HAL_LPTIM_PWM_Start_IT() argument
[all …]
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_dma.h436 __STATIC_INLINE void LL_DMA_EnableChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_EnableChannel() argument
439 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel - 1U]))->CCR, DMA_CCR_… in LL_DMA_EnableChannel()
455 __STATIC_INLINE void LL_DMA_DisableChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_DisableChannel() argument
458 …CLEAR_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel - 1U]))->CCR, DMA_CC… in LL_DMA_DisableChannel()
474 __STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_IsEnabledChannel() argument
477 …return ((READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel - 1U]))->CCR, in LL_DMA_IsEnabledChannel()
511 __STATIC_INLINE void LL_DMA_ConfigTransfer(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Configurat… in LL_DMA_ConfigTransfer() argument
514 MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel - 1U]))->CCR, in LL_DMA_ConfigTransfer()
537 __STATIC_INLINE void LL_DMA_SetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t … in LL_DMA_SetDataTransferDirection() argument
540 MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel - 1U]))->CCR, in LL_DMA_SetDataTransferDirection()
[all …]
/hal_stm32-latest/stm32cube/stm32wb0x/drivers/include/
Dstm32wb0x_ll_dma.h431 __STATIC_INLINE void LL_DMA_EnableChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_EnableChannel() argument
433 SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_EN); in LL_DMA_EnableChannel()
451 __STATIC_INLINE void LL_DMA_DisableChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_DisableChannel() argument
453 CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_EN); in LL_DMA_DisableChannel()
471 __STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_IsEnabledChannel() argument
473 return ((READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, in LL_DMA_IsEnabledChannel()
507 __STATIC_INLINE void LL_DMA_ConfigTransfer(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Configurat… in LL_DMA_ConfigTransfer() argument
509 MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, in LL_DMA_ConfigTransfer()
534 __STATIC_INLINE void LL_DMA_SetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t … in LL_DMA_SetDataTransferDirection() argument
536 MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, in LL_DMA_SetDataTransferDirection()
[all …]
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_lptim.c550 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Channel) in HAL_LPTIM_PWM_Start() argument
553 assert_param(IS_LPTIM_CCX_INSTANCE(hlptim->Instance, Channel)); in HAL_LPTIM_PWM_Start()
556 if (LPTIM_CHANNEL_STATE_GET(hlptim, Channel) != HAL_LPTIM_CHANNEL_STATE_READY) in HAL_LPTIM_PWM_Start()
565 LPTIM_CHANNEL_STATE_SET(hlptim, Channel, HAL_LPTIM_CHANNEL_STATE_BUSY); in HAL_LPTIM_PWM_Start()
574 __HAL_LPTIM_CAPTURE_COMPARE_ENABLE(hlptim, Channel); in HAL_LPTIM_PWM_Start()
595 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim, uint32_t Channel) in HAL_LPTIM_PWM_Stop() argument
598 assert_param(IS_LPTIM_CCX_INSTANCE(hlptim->Instance, Channel)); in HAL_LPTIM_PWM_Stop()
604 __HAL_LPTIM_CAPTURE_COMPARE_DISABLE(hlptim, Channel); in HAL_LPTIM_PWM_Stop()
610 LPTIM_CHANNEL_STATE_SET(hlptim, Channel, HAL_LPTIM_CHANNEL_STATE_READY); in HAL_LPTIM_PWM_Stop()
628 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel) in HAL_LPTIM_PWM_Start_IT() argument
[all …]
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_dma.h73 #define DMA_POSITION_CSELR_CXS ((Channel-1U)*4U)
507 __STATIC_INLINE void LL_DMA_EnableChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_EnableChannel() argument
509 …SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->… in LL_DMA_EnableChannel()
526 __STATIC_INLINE void LL_DMA_DisableChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_DisableChannel() argument
528 …CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))… in LL_DMA_DisableChannel()
545 __STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_IsEnabledChannel() argument
547 …return ((READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel … in LL_DMA_IsEnabledChannel()
580 __STATIC_INLINE void LL_DMA_ConfigTransfer(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Configurat… in LL_DMA_ConfigTransfer() argument
582 …MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U]))… in LL_DMA_ConfigTransfer()
606 __STATIC_INLINE void LL_DMA_SetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t … in LL_DMA_SetDataTransferDirection() argument
[all …]
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_dma.h504 __STATIC_INLINE void LL_DMA_EnableChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_EnableChannel() argument
506 SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_EN); in LL_DMA_EnableChannel()
523 __STATIC_INLINE void LL_DMA_DisableChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_DisableChannel() argument
525 CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_EN); in LL_DMA_DisableChannel()
542 __STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_IsEnabledChannel() argument
544 return ((READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, in LL_DMA_IsEnabledChannel()
577 __STATIC_INLINE void LL_DMA_ConfigTransfer(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Configurat… in LL_DMA_ConfigTransfer() argument
579 MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, in LL_DMA_ConfigTransfer()
603 __STATIC_INLINE void LL_DMA_SetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t … in LL_DMA_SetDataTransferDirection() argument
605 MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, in LL_DMA_SetDataTransferDirection()
[all …]
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_dma.h453 __STATIC_INLINE void LL_DMA_EnableChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_EnableChannel() argument
455 …SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->… in LL_DMA_EnableChannel()
472 __STATIC_INLINE void LL_DMA_DisableChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_DisableChannel() argument
474 …CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))… in LL_DMA_DisableChannel()
491 __STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_IsEnabledChannel() argument
493 …return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel -… in LL_DMA_IsEnabledChannel()
526 __STATIC_INLINE void LL_DMA_ConfigTransfer(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Configurat… in LL_DMA_ConfigTransfer() argument
528 …MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U]))… in LL_DMA_ConfigTransfer()
552 __STATIC_INLINE void LL_DMA_SetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t … in LL_DMA_SetDataTransferDirection() argument
554 …MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U]))… in LL_DMA_SetDataTransferDirection()
[all …]
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/
Dstm32u0xx_hal_lptim.c603 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Channel) in HAL_LPTIM_PWM_Start() argument
606 assert_param(IS_LPTIM_CCX_INSTANCE(hlptim->Instance, Channel)); in HAL_LPTIM_PWM_Start()
609 if (LPTIM_CHANNEL_STATE_GET(hlptim, Channel) != HAL_LPTIM_CHANNEL_STATE_READY) in HAL_LPTIM_PWM_Start()
618 LPTIM_CHANNEL_STATE_SET(hlptim, Channel, HAL_LPTIM_CHANNEL_STATE_BUSY); in HAL_LPTIM_PWM_Start()
627 __HAL_LPTIM_CAPTURE_COMPARE_ENABLE(hlptim, Channel); in HAL_LPTIM_PWM_Start()
650 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim, uint32_t Channel) in HAL_LPTIM_PWM_Stop() argument
653 assert_param(IS_LPTIM_CCX_INSTANCE(hlptim->Instance, Channel)); in HAL_LPTIM_PWM_Stop()
659 __HAL_LPTIM_CAPTURE_COMPARE_DISABLE(hlptim, Channel); in HAL_LPTIM_PWM_Stop()
665 LPTIM_CHANNEL_STATE_SET(hlptim, Channel, HAL_LPTIM_CHANNEL_STATE_READY); in HAL_LPTIM_PWM_Stop()
685 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel) in HAL_LPTIM_PWM_Start_IT() argument
[all …]
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_dma.h73 #define DMA_POSITION_CSELR_CXS(Channel) POSITION_VAL(DMA_CSELR_C1S << (((Channel)*4U) & … argument
552 __STATIC_INLINE void LL_DMA_EnableChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_EnableChannel() argument
555 SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_EN); in LL_DMA_EnableChannel()
572 __STATIC_INLINE void LL_DMA_DisableChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_DisableChannel() argument
575 …CLEAR_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_EN); in LL_DMA_DisableChannel()
592 __STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_IsEnabledChannel() argument
595 return ((READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, in LL_DMA_IsEnabledChannel()
628 __STATIC_INLINE void LL_DMA_ConfigTransfer(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Configurat… in LL_DMA_ConfigTransfer() argument
631 MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, in LL_DMA_ConfigTransfer()
655 __STATIC_INLINE void LL_DMA_SetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t … in LL_DMA_SetDataTransferDirection() argument
[all …]

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