| /hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/ |
| D | stm32f1xx_hal.h | 87 #define __HAL_DBGMCU_FREEZE_TIM2() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM2_STOP)
88 #define __HAL_DBGMCU_UNFREEZE_TIM2() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM2_STOP)
93 #define __HAL_DBGMCU_FREEZE_TIM3() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM3_STOP)
94 #define __HAL_DBGMCU_UNFREEZE_TIM3() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM3_STOP)
100 #define __HAL_DBGMCU_FREEZE_TIM4() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM4_STOP)
101 #define __HAL_DBGMCU_UNFREEZE_TIM4() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM4_STOP)
108 #define __HAL_DBGMCU_FREEZE_TIM5() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM5_STOP)
109 #define __HAL_DBGMCU_UNFREEZE_TIM5() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM5_STOP)
116 #define __HAL_DBGMCU_FREEZE_TIM6() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM6_STOP)
117 #define __HAL_DBGMCU_UNFREEZE_TIM6() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM6_STOP)
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| /hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/ |
| D | stm32f4xx_ll_pwr.h | 210 SET_BIT(PWR->CR, PWR_CR_FISSR); in LL_PWR_EnableFLASHInterfaceSTOP()
220 CLEAR_BIT(PWR->CR, PWR_CR_FISSR); in LL_PWR_DisableFLASHInterfaceSTOP()
230 return (READ_BIT(PWR->CR, PWR_CR_FISSR) == (PWR_CR_FISSR)); in LL_PWR_IsEnabledFLASHInterfaceSTOP()
243 SET_BIT(PWR->CR, PWR_CR_FMSSR); in LL_PWR_EnableFLASHMemorySTOP()
253 CLEAR_BIT(PWR->CR, PWR_CR_FMSSR); in LL_PWR_DisableFLASHMemorySTOP()
263 return (READ_BIT(PWR->CR, PWR_CR_FMSSR) == (PWR_CR_FMSSR)); in LL_PWR_IsEnabledFLASHMemorySTOP()
282 SET_BIT(PWR->CR, PWR_CR_UDEN); in LL_PWR_EnableUnderDriveMode()
292 CLEAR_BIT(PWR->CR, PWR_CR_UDEN); in LL_PWR_DisableUnderDriveMode()
302 return (READ_BIT(PWR->CR, PWR_CR_UDEN) == (PWR_CR_UDEN)); in LL_PWR_IsEnabledUnderDriveMode()
314 SET_BIT(PWR->CR, PWR_CR_ODSWEN); in LL_PWR_EnableOverDriveSwitching()
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| /hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/ |
| D | stm32h5xx_hal_rcc_ex.c | 2827 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL1RDY)) in HAL_RCCEx_GetPLL1ClockFreq()
2848 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL1RDY)) in HAL_RCCEx_GetPLL1ClockFreq()
2869 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL1RDY)) in HAL_RCCEx_GetPLL1ClockFreq()
2962 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY)) in HAL_RCCEx_GetPLL2ClockFreq()
2983 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY)) in HAL_RCCEx_GetPLL2ClockFreq()
3004 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY)) in HAL_RCCEx_GetPLL2ClockFreq()
3096 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3RDY)) in HAL_RCCEx_GetPLL3ClockFreq()
3117 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3RDY)) in HAL_RCCEx_GetPLL3ClockFreq()
3138 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3RDY)) in HAL_RCCEx_GetPLL3ClockFreq()
3256 else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) && (srcclk == RCC_RTCCLKSOURCE_HSE_DIVx)) in HAL_RCCEx_GetPeriphCLKFreq()
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| /hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/ |
| D | stm32n6xx_ll_rng.h | 200 SET_BIT(RNGx->CR, RNG_CR_RNGEN); in LL_RNG_Enable()
211 CLEAR_BIT(RNGx->CR, RNG_CR_RNGEN); in LL_RNG_Disable()
222 return ((READ_BIT(RNGx->CR, RNG_CR_RNGEN) == (RNG_CR_RNGEN)) ? 1UL : 0UL); in LL_RNG_IsEnabled()
233 MODIFY_REG(RNGx->CR, RNG_CR_CED | RNG_CR_CONDRST, LL_RNG_CED_ENABLE | RNG_CR_CONDRST); in LL_RNG_EnableClkErrorDetect()
234 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_EnableClkErrorDetect()
245 MODIFY_REG(RNGx->CR, RNG_CR_CED | RNG_CR_CONDRST, LL_RNG_CED_DISABLE | RNG_CR_CONDRST); in LL_RNG_DisableClkErrorDetect()
246 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_DisableClkErrorDetect()
257 return ((READ_BIT(RNGx->CR, RNG_CR_CED) != (RNG_CR_CED)) ? 1UL : 0UL); in LL_RNG_IsEnabledClkErrorDetect()
268 SET_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_EnableCondReset()
279 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_DisableCondReset()
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| /hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/ |
| D | stm32h5xx_ll_rng.h | 200 SET_BIT(RNGx->CR, RNG_CR_RNGEN); in LL_RNG_Enable()
211 CLEAR_BIT(RNGx->CR, RNG_CR_RNGEN); in LL_RNG_Disable()
222 return ((READ_BIT(RNGx->CR, RNG_CR_RNGEN) == (RNG_CR_RNGEN)) ? 1UL : 0UL); in LL_RNG_IsEnabled()
233 MODIFY_REG(RNGx->CR, RNG_CR_CED | RNG_CR_CONDRST, LL_RNG_CED_ENABLE | RNG_CR_CONDRST); in LL_RNG_EnableClkErrorDetect()
234 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_EnableClkErrorDetect()
245 MODIFY_REG(RNGx->CR, RNG_CR_CED | RNG_CR_CONDRST, LL_RNG_CED_DISABLE | RNG_CR_CONDRST); in LL_RNG_DisableClkErrorDetect()
246 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_DisableClkErrorDetect()
257 return ((READ_BIT(RNGx->CR, RNG_CR_CED) != (RNG_CR_CED)) ? 1UL : 0UL); in LL_RNG_IsEnabledClkErrorDetect()
268 SET_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_EnableCondReset()
279 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_DisableCondReset()
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| /hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/ |
| D | stm32u0xx_ll_rng.h | 200 SET_BIT(RNGx->CR, RNG_CR_RNGEN); in LL_RNG_Enable()
211 CLEAR_BIT(RNGx->CR, RNG_CR_RNGEN); in LL_RNG_Disable()
222 return ((READ_BIT(RNGx->CR, RNG_CR_RNGEN) == (RNG_CR_RNGEN)) ? 1UL : 0UL); in LL_RNG_IsEnabled()
233 MODIFY_REG(RNGx->CR, RNG_CR_CED | RNG_CR_CONDRST, LL_RNG_CED_ENABLE | RNG_CR_CONDRST); in LL_RNG_EnableClkErrorDetect()
234 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_EnableClkErrorDetect()
245 MODIFY_REG(RNGx->CR, RNG_CR_CED | RNG_CR_CONDRST, LL_RNG_CED_DISABLE | RNG_CR_CONDRST); in LL_RNG_DisableClkErrorDetect()
246 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_DisableClkErrorDetect()
257 return ((READ_BIT(RNGx->CR, RNG_CR_CED) != (RNG_CR_CED)) ? 1UL : 0UL); in LL_RNG_IsEnabledClkErrorDetect()
268 SET_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_EnableCondReset()
279 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_DisableCondReset()
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| /hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/ |
| D | stm32u5xx_ll_rng.h | 200 SET_BIT(RNGx->CR, RNG_CR_RNGEN); in LL_RNG_Enable()
211 CLEAR_BIT(RNGx->CR, RNG_CR_RNGEN); in LL_RNG_Disable()
222 return ((READ_BIT(RNGx->CR, RNG_CR_RNGEN) == (RNG_CR_RNGEN)) ? 1UL : 0UL); in LL_RNG_IsEnabled()
233 MODIFY_REG(RNGx->CR, RNG_CR_CED | RNG_CR_CONDRST, LL_RNG_CED_ENABLE | RNG_CR_CONDRST); in LL_RNG_EnableClkErrorDetect()
234 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_EnableClkErrorDetect()
245 MODIFY_REG(RNGx->CR, RNG_CR_CED | RNG_CR_CONDRST, LL_RNG_CED_DISABLE | RNG_CR_CONDRST); in LL_RNG_DisableClkErrorDetect()
246 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_DisableClkErrorDetect()
257 return ((READ_BIT(RNGx->CR, RNG_CR_CED) != (RNG_CR_CED)) ? 1UL : 0UL); in LL_RNG_IsEnabledClkErrorDetect()
268 SET_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_EnableCondReset()
279 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_DisableCondReset()
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| /hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/ |
| D | stm32wbaxx_ll_rng.h | 200 SET_BIT(RNGx->CR, RNG_CR_RNGEN); in LL_RNG_Enable()
211 CLEAR_BIT(RNGx->CR, RNG_CR_RNGEN); in LL_RNG_Disable()
222 return ((READ_BIT(RNGx->CR, RNG_CR_RNGEN) == (RNG_CR_RNGEN)) ? 1UL : 0UL); in LL_RNG_IsEnabled()
233 MODIFY_REG(RNGx->CR, RNG_CR_CED | RNG_CR_CONDRST, LL_RNG_CED_ENABLE | RNG_CR_CONDRST); in LL_RNG_EnableClkErrorDetect()
234 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_EnableClkErrorDetect()
245 MODIFY_REG(RNGx->CR, RNG_CR_CED | RNG_CR_CONDRST, LL_RNG_CED_DISABLE | RNG_CR_CONDRST); in LL_RNG_DisableClkErrorDetect()
246 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_DisableClkErrorDetect()
257 return ((READ_BIT(RNGx->CR, RNG_CR_CED) != (RNG_CR_CED)) ? 1UL : 0UL); in LL_RNG_IsEnabledClkErrorDetect()
268 SET_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_EnableCondReset()
279 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_DisableCondReset()
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| /hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/ |
| D | stm32l0xx_ll_pwr.h | 202 SET_BIT(PWR->CR, PWR_CR_LPRUN); in LL_PWR_EnableLowPowerRunMode()
212 CLEAR_BIT(PWR->CR, PWR_CR_LPRUN); in LL_PWR_DisableLowPowerRunMode()
222 return (READ_BIT(PWR->CR, PWR_CR_LPRUN) == (PWR_CR_LPRUN)); in LL_PWR_IsEnabledLowPowerRunMode()
240 SET_BIT(PWR->CR, PWR_CR_LPSDSR); /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_LOW_POWER) */ in LL_PWR_EnterLowPowerRunMode()
241 SET_BIT(PWR->CR, PWR_CR_LPRUN); /* => LL_PWR_EnableLowPowerRunMode() */ in LL_PWR_EnterLowPowerRunMode()
259 CLEAR_BIT(PWR->CR, PWR_CR_LPRUN); /* => LL_PWR_DisableLowPowerRunMode() */ in LL_PWR_ExitLowPowerRunMode()
260 CLEAR_BIT(PWR->CR, PWR_CR_LPSDSR); /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_MAIN) */ in LL_PWR_ExitLowPowerRunMode()
273 MODIFY_REG(PWR->CR, PWR_CR_VOS, VoltageScaling); in LL_PWR_SetRegulVoltageScaling()
286 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_VOS)); in LL_PWR_GetRegulVoltageScaling()
296 SET_BIT(PWR->CR, PWR_CR_DBP); in LL_PWR_EnableBkUpAccess()
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| D | stm32l0xx_ll_crs.h | 237 SET_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_EnableFreqErrorCounter()
247 CLEAR_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_DisableFreqErrorCounter()
257 return (READ_BIT(CRS->CR, CRS_CR_CEN) == (CRS_CR_CEN)); in LL_CRS_IsEnabledFreqErrorCounter()
267 SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_EnableAutoTrimming()
277 CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_DisableAutoTrimming()
287 return (READ_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) == (CRS_CR_AUTOTRIMEN)); in LL_CRS_IsEnabledAutoTrimming()
300 MODIFY_REG(CRS->CR, CRS_CR_TRIM, Value << CRS_POSITION_TRIM); in LL_CRS_SetHSI48SmoothTrimming()
310 return (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_POSITION_TRIM); in LL_CRS_GetHSI48SmoothTrimming()
467 MODIFY_REG(CRS->CR, CRS_CR_TRIM, HSI48CalibrationValue); in LL_CRS_ConfigSynchronization()
488 SET_BIT(CRS->CR, CRS_CR_SWSYNC); in LL_CRS_GenerateEvent_SWSYNC()
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| /hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/ |
| D | stm32h7rsxx_ll_rng.h | 200 SET_BIT(RNGx->CR, RNG_CR_RNGEN); in LL_RNG_Enable()
211 CLEAR_BIT(RNGx->CR, RNG_CR_RNGEN); in LL_RNG_Disable()
222 return ((READ_BIT(RNGx->CR, RNG_CR_RNGEN) == (RNG_CR_RNGEN)) ? 1UL : 0UL); in LL_RNG_IsEnabled()
233 CLEAR_BIT(RNGx->CR, RNG_CR_CED); in LL_RNG_EnableClkErrorDetect()
244 SET_BIT(RNGx->CR, RNG_CR_CED); in LL_RNG_DisableClkErrorDetect()
255 return ((READ_BIT(RNGx->CR, RNG_CR_CED) != (RNG_CR_CED)) ? 1UL : 0UL); in LL_RNG_IsEnabledClkErrorDetect()
266 SET_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_EnableCondReset()
277 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_DisableCondReset()
288 return ((READ_BIT(RNGx->CR, RNG_CR_CONDRST) == (RNG_CR_CONDRST)) ? 1UL : 0UL); in LL_RNG_IsEnabledCondReset()
299 SET_BIT(RNGx->CR, RNG_CR_CONFIGLOCK); in LL_RNG_ConfigLock()
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| /hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/ |
| D | stm32l4xx_ll_rng.h | 208 SET_BIT(RNGx->CR, RNG_CR_RNGEN); in LL_RNG_Enable()
219 CLEAR_BIT(RNGx->CR, RNG_CR_RNGEN); in LL_RNG_Disable()
230 return ((READ_BIT(RNGx->CR, RNG_CR_RNGEN) == (RNG_CR_RNGEN)) ? 1UL : 0UL); in LL_RNG_IsEnabled()
243 MODIFY_REG(RNGx->CR, RNG_CR_CED | RNG_CR_CONDRST, LL_RNG_CED_ENABLE | RNG_CR_CONDRST); in LL_RNG_EnableClkErrorDetect()
244 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_EnableClkErrorDetect()
246 CLEAR_BIT(RNGx->CR, RNG_CR_CED); in LL_RNG_EnableClkErrorDetect()
259 MODIFY_REG(RNGx->CR, RNG_CR_CED | RNG_CR_CONDRST, LL_RNG_CED_DISABLE | RNG_CR_CONDRST); in LL_RNG_DisableClkErrorDetect()
260 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_DisableClkErrorDetect()
262 SET_BIT(RNGx->CR, RNG_CR_CED); in LL_RNG_DisableClkErrorDetect()
274 return ((READ_BIT(RNGx->CR, RNG_CR_CED) != (RNG_CR_CED)) ? 1UL : 0UL); in LL_RNG_IsEnabledClkErrorDetect()
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| D | stm32l4xx_ll_rtc.h | 974 MODIFY_REG(RTCx->CR, RTC_CR_FMT, HourFormat); in LL_RTC_SetHourFormat()
987 return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_FMT)); in LL_RTC_GetHourFormat()
1004 MODIFY_REG(RTCx->CR, RTC_CR_OSEL, AlarmOutput); in LL_RTC_SetAlarmOutEvent()
1019 return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_OSEL)); in LL_RTC_GetAlarmOutEvent()
1034 MODIFY_REG(RTCx->CR, RTC_CR_TAMPALRM_TYPE, Output); in LL_RTC_SetAlarmOutputType()
1047 return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_TAMPALRM_TYPE)); in LL_RTC_GetAlarmOutputType()
1226 MODIFY_REG(RTCx->CR, RTC_CR_POL, Polarity); in LL_RTC_SetOutputPolarity()
1239 return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_POL)); in LL_RTC_GetOutputPolarity()
1251 SET_BIT(RTCx->CR, RTC_CR_BYPSHAD); in LL_RTC_EnableShadowRegBypass()
1262 CLEAR_BIT(RTCx->CR, RTC_CR_BYPSHAD); in LL_RTC_DisableShadowRegBypass()
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| /hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/ |
| D | stm32h7xx_ll_rng.h | 202 SET_BIT(RNGx->CR, RNG_CR_RNGEN); in LL_RNG_Enable()
213 CLEAR_BIT(RNGx->CR, RNG_CR_RNGEN); in LL_RNG_Disable()
224 return ((READ_BIT(RNGx->CR, RNG_CR_RNGEN) == (RNG_CR_RNGEN)) ? 1UL : 0UL); in LL_RNG_IsEnabled()
236 MODIFY_REG(RNGx->CR, RNG_CR_CED | RNG_CR_CONDRST, LL_RNG_CED_ENABLE | RNG_CR_CONDRST); in LL_RNG_EnableClkErrorDetect()
237 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_EnableClkErrorDetect()
239 CLEAR_BIT(RNGx->CR, RNG_CR_CED); in LL_RNG_EnableClkErrorDetect()
252 MODIFY_REG(RNGx->CR, RNG_CR_CED | RNG_CR_CONDRST, LL_RNG_CED_DISABLE | RNG_CR_CONDRST); in LL_RNG_DisableClkErrorDetect()
253 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_DisableClkErrorDetect()
255 SET_BIT(RNGx->CR, RNG_CR_CED); in LL_RNG_DisableClkErrorDetect()
267 return ((READ_BIT(RNGx->CR, RNG_CR_CED) != (RNG_CR_CED)) ? 1UL : 0UL); in LL_RNG_IsEnabledClkErrorDetect()
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| /hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/ |
| D | stm32l5xx_hal_rcc_ex.c | 849 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) in HAL_RCCEx_GetPeriphCLKFreq()
868 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_MSIRDY)) in HAL_RCCEx_GetPeriphCLKFreq()
879 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) in HAL_RCCEx_GetPeriphCLKFreq()
889 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) in HAL_RCCEx_GetPeriphCLKFreq()
927 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_MSIRDY)) in HAL_RCCEx_GetPeriphCLKFreq()
934 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)) in HAL_RCCEx_GetPeriphCLKFreq()
947 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLSAI1RDY)) in HAL_RCCEx_GetPeriphCLKFreq()
978 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1009 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_MSIRDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1016 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)) in HAL_RCCEx_GetPeriphCLKFreq()
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| D | stm32l5xx_hal_rcc.c | 246 SET_BIT(RCC->CR, RCC_CR_MSION); in HAL_RCC_DeInit()
253 while (READ_BIT(RCC->CR, RCC_CR_MSIRDY) == 0U) in HAL_RCC_DeInit()
258 if (READ_BIT(RCC->CR, RCC_CR_MSIRDY) == 0U) in HAL_RCC_DeInit()
266 MODIFY_REG(RCC->CR, RCC_CR_MSIRANGE, RCC_MSIRANGE_6); in HAL_RCC_DeInit()
298 …CLEAR_BIT(RCC->CR, RCC_CR_CSSON | RCC_CR_HSEON | RCC_CR_HSION | RCC_CR_HSIKERON | RCC_CR_HSIASFS |… in HAL_RCC_DeInit()
307 while (READ_BIT(RCC->CR, RCC_CR_PLLRDY | RCC_CR_PLLSAI1RDY | RCC_CR_PLLSAI2RDY) != 0U) in HAL_RCC_DeInit()
312 if (READ_BIT(RCC->CR, RCC_CR_PLLRDY | RCC_CR_PLLSAI1RDY | RCC_CR_PLLSAI2RDY) != 0U) in HAL_RCC_DeInit()
321 while (READ_BIT(RCC->CR, RCC_CR_PLLRDY | RCC_CR_PLLSAI1RDY) != 0U) in HAL_RCC_DeInit()
326 if (READ_BIT(RCC->CR, RCC_CR_PLLRDY | RCC_CR_PLLSAI1RDY) != 0U) in HAL_RCC_DeInit()
374 CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP); in HAL_RCC_DeInit()
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| /hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/ |
| D | stm32l1xx_ll_pwr.h | 202 SET_BIT(PWR->CR, PWR_CR_LPRUN); in LL_PWR_EnableLowPowerRunMode()
212 CLEAR_BIT(PWR->CR, PWR_CR_LPRUN); in LL_PWR_DisableLowPowerRunMode()
222 return ((READ_BIT(PWR->CR, PWR_CR_LPRUN) == PWR_CR_LPRUN) ? 1UL : 0UL); in LL_PWR_IsEnabledLowPowerRunMode()
240 SET_BIT(PWR->CR, PWR_CR_LPSDSR); /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_LOW_POWER) */ in LL_PWR_EnterLowPowerRunMode()
241 SET_BIT(PWR->CR, PWR_CR_LPRUN); /* => LL_PWR_EnableLowPowerRunMode() */ in LL_PWR_EnterLowPowerRunMode()
259 CLEAR_BIT(PWR->CR, PWR_CR_LPRUN); /* => LL_PWR_DisableLowPowerRunMode() */ in LL_PWR_ExitLowPowerRunMode()
260 CLEAR_BIT(PWR->CR, PWR_CR_LPSDSR); /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_MAIN) */ in LL_PWR_ExitLowPowerRunMode()
273 MODIFY_REG(PWR->CR, PWR_CR_VOS, VoltageScaling); in LL_PWR_SetRegulVoltageScaling()
286 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_VOS)); in LL_PWR_GetRegulVoltageScaling()
296 SET_BIT(PWR->CR, PWR_CR_DBP); in LL_PWR_EnableBkUpAccess()
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| /hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/ |
| D | stm32l5xx_ll_rng.h | 200 SET_BIT(RNGx->CR, RNG_CR_RNGEN); in LL_RNG_Enable()
211 CLEAR_BIT(RNGx->CR, RNG_CR_RNGEN); in LL_RNG_Disable()
222 return ((READ_BIT(RNGx->CR, RNG_CR_RNGEN) == (RNG_CR_RNGEN)) ? 1UL : 0UL); in LL_RNG_IsEnabled()
233 MODIFY_REG(RNGx->CR, RNG_CR_CED | RNG_CR_CONDRST, LL_RNG_CED_ENABLE | RNG_CR_CONDRST); in LL_RNG_EnableClkErrorDetect()
234 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_EnableClkErrorDetect()
245 MODIFY_REG(RNGx->CR, RNG_CR_CED | RNG_CR_CONDRST, LL_RNG_CED_DISABLE | RNG_CR_CONDRST); in LL_RNG_DisableClkErrorDetect()
246 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_DisableClkErrorDetect()
257 return ((READ_BIT(RNGx->CR, RNG_CR_CED) != (RNG_CR_CED)) ? 1UL : 0UL); in LL_RNG_IsEnabledClkErrorDetect()
268 SET_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_EnableCondReset()
279 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_DisableCondReset()
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| /hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/ |
| D | stm32wlxx_ll_rng.h | 191 SET_BIT(RNGx->CR, RNG_CR_RNGEN); in LL_RNG_Enable()
202 CLEAR_BIT(RNGx->CR, RNG_CR_RNGEN); in LL_RNG_Disable()
213 return ((READ_BIT(RNGx->CR, RNG_CR_RNGEN) == (RNG_CR_RNGEN)) ? 1UL : 0UL); in LL_RNG_IsEnabled()
224 CLEAR_BIT(RNGx->CR, RNG_CR_CED); in LL_RNG_EnableClkErrorDetect()
235 SET_BIT(RNGx->CR, RNG_CR_CED); in LL_RNG_DisableClkErrorDetect()
246 return ((READ_BIT(RNGx->CR, RNG_CR_CED) != (RNG_CR_CED)) ? 1UL : 0UL); in LL_RNG_IsEnabledClkErrorDetect()
257 SET_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_EnableCondReset()
268 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST); in LL_RNG_DisableCondReset()
279 return ((READ_BIT(RNGx->CR, RNG_CR_CONDRST) == (RNG_CR_CONDRST)) ? 1UL : 0UL); in LL_RNG_IsEnabledCondReset()
290 SET_BIT(RNGx->CR, RNG_CR_CONFIGLOCK); in LL_RNG_ConfigLock()
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| /hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/ |
| D | stm32h7xx_hal_rcc_ex.c | 1903 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL1RDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1916 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1930 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3RDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1947 if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSI)) in HAL_RCCEx_GetPeriphCLKFreq()
1953 else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_CSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_CSI)) in HAL_RCCEx_GetPeriphCLKFreq()
1959 else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSE)) in HAL_RCCEx_GetPeriphCLKFreq()
1997 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL1RDY)) in HAL_RCCEx_GetPeriphCLKFreq()
2010 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY)) in HAL_RCCEx_GetPeriphCLKFreq()
2024 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3RDY)) in HAL_RCCEx_GetPeriphCLKFreq()
2041 if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSI)) in HAL_RCCEx_GetPeriphCLKFreq()
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| /hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/ |
| D | stm32h7rsxx_hal_rcc_ex.c | 1560 if (READ_BIT(RCC->CR, RCC_CR_HSIRDY) != 0U) in HAL_RCCEx_GetPeriphCLKFreq()
1562 if (READ_BIT(RCC->CR, RCC_CR_HSIDIVF) != 0U) in HAL_RCCEx_GetPeriphCLKFreq()
1645 if (READ_BIT(RCC->CR, RCC_CR_HSIRDY) != 0U) in HAL_RCCEx_GetPeriphCLKFreq()
1647 if (READ_BIT(RCC->CR, RCC_CR_HSIDIVF) != 0U) in HAL_RCCEx_GetPeriphCLKFreq()
1658 if (READ_BIT(RCC->CR, RCC_CR_CSIRDY) != 0U) in HAL_RCCEx_GetPeriphCLKFreq()
1664 if (READ_BIT(RCC->CR, RCC_CR_HSERDY) != 0U) in HAL_RCCEx_GetPeriphCLKFreq()
1726 if (READ_BIT(RCC->CR, RCC_CR_CSIRDY) != 0U) in HAL_RCCEx_GetPeriphCLKFreq()
1732 if (READ_BIT(RCC->CR, RCC_CR_HSIRDY) != 0U) in HAL_RCCEx_GetPeriphCLKFreq()
1734 if (READ_BIT(RCC->CR, RCC_CR_HSIDIVF) != 0U) in HAL_RCCEx_GetPeriphCLKFreq()
1768 if (READ_BIT(RCC->CR, RCC_CR_CSIRDY) != 0U) in HAL_RCCEx_GetPeriphCLKFreq()
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| /hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/ |
| D | stm32u5xx_hal_rcc_ex.c | 1829 else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) && (srcclk == RCC_RTCCLKSOURCE_HSE_DIV32)) in HAL_RCCEx_GetPeriphCLKFreq()
1870 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1919 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1942 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY) && (srcclk == RCC_SAESCLKSOURCE_SHSI)) in HAL_RCCEx_GetPeriphCLKFreq()
1946 else if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY) && (srcclk == RCC_SAESCLKSOURCE_SHSI_DIV2)) in HAL_RCCEx_GetPeriphCLKFreq()
1977 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSI48RDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1989 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_MSIKRDY)) in HAL_RCCEx_GetPeriphCLKFreq()
2028 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSI48RDY)) in HAL_RCCEx_GetPeriphCLKFreq()
2040 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_MSIKRDY)) in HAL_RCCEx_GetPeriphCLKFreq()
2080 else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (srcclk == RCC_USART1CLKSOURCE_HSI)) in HAL_RCCEx_GetPeriphCLKFreq()
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| /hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/ |
| D | stm32l4xx_hal_rcc_ex.c | 744 while(READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) != 0U) in HAL_RCCEx_PeriphCLKConfig()
1197 if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1216 if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_MSIRDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1227 if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1237 if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1289 if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_MSIRDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1296 if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1310 if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLSAI1RDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1350 if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1381 if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_MSIRDY)) in HAL_RCCEx_GetPeriphCLKFreq()
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| D | stm32l4xx_hal_rcc.c | 271 SET_BIT(RCC->CR, RCC_CR_MSION); in HAL_RCC_DeInit()
278 while(READ_BIT(RCC->CR, RCC_CR_MSIRDY) == 0U) in HAL_RCC_DeInit()
287 MODIFY_REG(RCC->CR, RCC_CR_MSIRANGE, RCC_MSIRANGE_6); in HAL_RCC_DeInit()
317 …CLEAR_BIT(RCC->CR, RCC_CR_HSEON | RCC_CR_HSION | RCC_CR_HSIKERON| RCC_CR_HSIASFS | RCC_CR_PLLON | … in HAL_RCC_DeInit()
321 …CLEAR_BIT(RCC->CR, RCC_CR_HSEON | RCC_CR_HSION | RCC_CR_HSIKERON| RCC_CR_HSIASFS | RCC_CR_PLLON | … in HAL_RCC_DeInit()
325 CLEAR_BIT(RCC->CR, RCC_CR_HSEON | RCC_CR_HSION | RCC_CR_HSIKERON| RCC_CR_HSIASFS | RCC_CR_PLLON); in HAL_RCC_DeInit()
335 while(READ_BIT(RCC->CR, RCC_CR_PLLRDY | RCC_CR_PLLSAI1RDY | RCC_CR_PLLSAI2RDY) != 0U) in HAL_RCC_DeInit()
339 while(READ_BIT(RCC->CR, RCC_CR_PLLRDY | RCC_CR_PLLSAI1RDY) != 0U) in HAL_RCC_DeInit()
343 while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) in HAL_RCC_DeInit()
374 CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP); in HAL_RCC_DeInit()
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| /hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/ |
| D | stm32wbxx_ll_crs.h | 237 SET_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_EnableFreqErrorCounter()
247 CLEAR_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_DisableFreqErrorCounter()
257 return ((READ_BIT(CRS->CR, CRS_CR_CEN) == (CRS_CR_CEN)) ? 1UL : 0UL); in LL_CRS_IsEnabledFreqErrorCounter()
267 SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_EnableAutoTrimming()
277 CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_DisableAutoTrimming()
287 return ((READ_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) == (CRS_CR_AUTOTRIMEN)) ? 1UL : 0UL); in LL_CRS_IsEnabledAutoTrimming()
300 MODIFY_REG(CRS->CR, CRS_CR_TRIM, Value << CRS_POSITION_TRIM); in LL_CRS_SetHSI48SmoothTrimming()
310 return (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_POSITION_TRIM); in LL_CRS_GetHSI48SmoothTrimming()
467 MODIFY_REG(CRS->CR, CRS_CR_TRIM, HSI48CalibrationValue); in LL_CRS_ConfigSynchronization()
488 SET_BIT(CRS->CR, CRS_CR_SWSYNC); in LL_CRS_GenerateEvent_SWSYNC()
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