202   SET_BIT(PWR->CR, PWR_CR_LPRUN);  in LL_PWR_EnableLowPowerRunMode()
212   CLEAR_BIT(PWR->CR, PWR_CR_LPRUN);  in LL_PWR_DisableLowPowerRunMode()
222   return ((READ_BIT(PWR->CR, PWR_CR_LPRUN) == PWR_CR_LPRUN) ? 1UL : 0UL);  in LL_PWR_IsEnabledLowPowerRunMode()
240   SET_BIT(PWR->CR, PWR_CR_LPSDSR); /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_LOW_POWER) */  in LL_PWR_EnterLowPowerRunMode()
241   SET_BIT(PWR->CR, PWR_CR_LPRUN);  /* => LL_PWR_EnableLowPowerRunMode() */  in LL_PWR_EnterLowPowerRunMode()
259   CLEAR_BIT(PWR->CR, PWR_CR_LPRUN);   /* => LL_PWR_DisableLowPowerRunMode() */  in LL_PWR_ExitLowPowerRunMode()
260   CLEAR_BIT(PWR->CR, PWR_CR_LPSDSR);  /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_MAIN) */  in LL_PWR_ExitLowPowerRunMode()
273   MODIFY_REG(PWR->CR, PWR_CR_VOS, VoltageScaling);  in LL_PWR_SetRegulVoltageScaling()
286   return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_VOS));  in LL_PWR_GetRegulVoltageScaling()
296   SET_BIT(PWR->CR, PWR_CR_DBP);  in LL_PWR_EnableBkUpAccess()
306   CLEAR_BIT(PWR->CR, PWR_CR_DBP);  in LL_PWR_DisableBkUpAccess()
316   return ((READ_BIT(PWR->CR, PWR_CR_DBP) == PWR_CR_DBP) ? 1UL : 0UL);  in LL_PWR_IsEnabledBkUpAccess()
329   MODIFY_REG(PWR->CR, PWR_CR_LPSDSR, RegulMode);  in LL_PWR_SetRegulModeLP()
341   return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPSDSR));  in LL_PWR_GetRegulModeLP()
355   MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode);  in LL_PWR_SetRegulModeDS()
367   return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS));  in LL_PWR_GetRegulModeDS()
385   MODIFY_REG(PWR->CR, PWR_CR_PDDS, PDMode);  in LL_PWR_SetPowerMode()
397   return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PDDS));  in LL_PWR_GetPowerMode()
417   MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel);  in LL_PWR_SetPVDLevel()
435   return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS));  in LL_PWR_GetPVDLevel()
445   SET_BIT(PWR->CR, PWR_CR_PVDE);  in LL_PWR_EnablePVD()
455   CLEAR_BIT(PWR->CR, PWR_CR_PVDE);  in LL_PWR_DisablePVD()
465   return ((READ_BIT(PWR->CR, PWR_CR_PVDE) == PWR_CR_PVDE) ? 1UL : 0UL);  in LL_PWR_IsEnabledPVD()
530   SET_BIT(PWR->CR, PWR_CR_ULP);  in LL_PWR_EnableUltraLowPower()
540   CLEAR_BIT(PWR->CR, PWR_CR_ULP);  in LL_PWR_DisableUltraLowPower()
550   return ((READ_BIT(PWR->CR, PWR_CR_ULP) == PWR_CR_ULP) ? 1UL : 0UL);  in LL_PWR_IsEnabledUltraLowPower()
561   SET_BIT(PWR->CR, PWR_CR_FWU);  in LL_PWR_EnableFastWakeUp()
572   CLEAR_BIT(PWR->CR, PWR_CR_FWU);  in LL_PWR_DisableFastWakeUp()
582   return ((READ_BIT(PWR->CR, PWR_CR_FWU) == PWR_CR_FWU) ? 1UL : 0UL);  in LL_PWR_IsEnabledFastWakeUp()
663   SET_BIT(PWR->CR, PWR_CR_CSBF);  in LL_PWR_ClearFlag_SB()
673   SET_BIT(PWR->CR, PWR_CR_CWUF);  in LL_PWR_ClearFlag_WU()