| /hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/ |
| D | stm32h5xx_ll_cordic.h | 610 SET_BIT(CORDICx->CSR, CORDIC_CSR_DMAREN); in LL_CORDIC_EnableDMAReq_RD()
621 CLEAR_BIT(CORDICx->CSR, CORDIC_CSR_DMAREN); in LL_CORDIC_DisableDMAReq_RD()
632 return ((READ_BIT(CORDICx->CSR, CORDIC_CSR_DMAREN) == (CORDIC_CSR_DMAREN)) ? 1U : 0U); in LL_CORDIC_IsEnabledDMAReq_RD()
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| D | stm32h5xx_hal_cordic.h | 251 #define CORDIC_DMA_REN CORDIC_CSR_DMAREN /*!< DMA Read requests enable */
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| /hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/ |
| D | stm32u5xx_ll_cordic.h | 610 SET_BIT(CORDICx->CSR, CORDIC_CSR_DMAREN); in LL_CORDIC_EnableDMAReq_RD()
621 CLEAR_BIT(CORDICx->CSR, CORDIC_CSR_DMAREN); in LL_CORDIC_DisableDMAReq_RD()
632 return ((READ_BIT(CORDICx->CSR, CORDIC_CSR_DMAREN) == (CORDIC_CSR_DMAREN)) ? 1U : 0U); in LL_CORDIC_IsEnabledDMAReq_RD()
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| D | stm32u5xx_hal_cordic.h | 251 #define CORDIC_DMA_REN CORDIC_CSR_DMAREN /*!< DMA Read requests enable */
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| /hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/ |
| D | stm32h7xx_ll_cordic.h | 610 SET_BIT(CORDICx->CSR, CORDIC_CSR_DMAREN); in LL_CORDIC_EnableDMAReq_RD()
621 CLEAR_BIT(CORDICx->CSR, CORDIC_CSR_DMAREN); in LL_CORDIC_DisableDMAReq_RD()
632 return ((READ_BIT(CORDICx->CSR, CORDIC_CSR_DMAREN) == (CORDIC_CSR_DMAREN)) ? 1U : 0U); in LL_CORDIC_IsEnabledDMAReq_RD()
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| D | stm32h7xx_hal_cordic.h | 251 #define CORDIC_DMA_REN CORDIC_CSR_DMAREN /*!< DMA Read requests enable */
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| /hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/ |
| D | stm32h7rsxx_ll_cordic.h | 610 SET_BIT(CORDICx->CSR, CORDIC_CSR_DMAREN); in LL_CORDIC_EnableDMAReq_RD()
621 CLEAR_BIT(CORDICx->CSR, CORDIC_CSR_DMAREN); in LL_CORDIC_DisableDMAReq_RD()
632 return ((READ_BIT(CORDICx->CSR, CORDIC_CSR_DMAREN) == (CORDIC_CSR_DMAREN)) ? 1U : 0U); in LL_CORDIC_IsEnabledDMAReq_RD()
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| D | stm32h7rsxx_hal_cordic.h | 251 #define CORDIC_DMA_REN CORDIC_CSR_DMAREN /*!< DMA Read requests enable */
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| /hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/ |
| D | stm32g4xx_ll_cordic.h | 610 SET_BIT(CORDICx->CSR, CORDIC_CSR_DMAREN); in LL_CORDIC_EnableDMAReq_RD()
621 CLEAR_BIT(CORDICx->CSR, CORDIC_CSR_DMAREN); in LL_CORDIC_DisableDMAReq_RD()
632 return ((READ_BIT(CORDICx->CSR, CORDIC_CSR_DMAREN) == (CORDIC_CSR_DMAREN)) ? 1U : 0U); in LL_CORDIC_IsEnabledDMAReq_RD()
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| D | stm32g4xx_hal_cordic.h | 251 #define CORDIC_DMA_REN CORDIC_CSR_DMAREN /*!< DMA Read requests enable */
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| /hal_stm32-latest/stm32cube/stm32g4xx/soc/ |
| D | stm32g411xb.h | 2159 #define CORDIC_CSR_DMAREN CORDIC_CSR_DMAREN_Msk /*!< DMA Read channe… macro
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| D | stm32g411xc.h | 2196 #define CORDIC_CSR_DMAREN CORDIC_CSR_DMAREN_Msk /*!< DMA Read channe… macro
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| D | stm32g441xx.h | 2504 #define CORDIC_CSR_DMAREN CORDIC_CSR_DMAREN_Msk /*!< DMA Read channe… macro
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| D | stm32gbk1cb.h | 2269 #define CORDIC_CSR_DMAREN CORDIC_CSR_DMAREN_Msk /*!< DMA Read channe… macro
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| D | stm32g431xx.h | 2283 #define CORDIC_CSR_DMAREN CORDIC_CSR_DMAREN_Msk /*!< DMA Read channe… macro
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| D | stm32g4a1xx.h | 2584 #define CORDIC_CSR_DMAREN CORDIC_CSR_DMAREN_Msk /*!< DMA Read channe… macro
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| D | stm32g491xx.h | 2363 #define CORDIC_CSR_DMAREN CORDIC_CSR_DMAREN_Msk /*!< DMA Read channe… macro
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| D | stm32g473xx.h | 2452 #define CORDIC_CSR_DMAREN CORDIC_CSR_DMAREN_Msk /*!< DMA Read channe… macro
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| D | stm32g471xx.h | 2374 #define CORDIC_CSR_DMAREN CORDIC_CSR_DMAREN_Msk /*!< DMA Read channe… macro
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| D | stm32g483xx.h | 2673 #define CORDIC_CSR_DMAREN CORDIC_CSR_DMAREN_Msk /*!< DMA Read channe… macro
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| D | stm32g414xx.h | 2558 #define CORDIC_CSR_DMAREN CORDIC_CSR_DMAREN_Msk /*!< DMA Read channe… macro
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| D | stm32g474xx.h | 2582 #define CORDIC_CSR_DMAREN CORDIC_CSR_DMAREN_Msk /*!< DMA Read channe… macro
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| D | stm32g484xx.h | 2803 #define CORDIC_CSR_DMAREN CORDIC_CSR_DMAREN_Msk /*!< DMA Read channe… macro
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| /hal_stm32-latest/stm32cube/stm32u5xx/soc/ |
| D | stm32u545xx.h | 4710 #define CORDIC_CSR_DMAREN CORDIC_CSR_DMAREN_Msk /*!< DMA Read c… macro
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| /hal_stm32-latest/stm32cube/stm32h7rsxx/soc/ |
| D | stm32h7r3xx.h | 3789 #define CORDIC_CSR_DMAREN CORDIC_CSR_DMAREN_Msk /*!< DMA Read c… macro
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