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Searched refs:APB1PERIPH_BASE_S (Results 1 – 25 of 27) sorted by relevance

12

/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h1518 #define APB1PERIPH_BASE_S PERIPH_BASE_S macro
1525 #define TIM2_BASE_S (APB1PERIPH_BASE_S + 0x0000UL)
1526 #define TIM3_BASE_S (APB1PERIPH_BASE_S + 0x0400UL)
1527 #define TIM4_BASE_S (APB1PERIPH_BASE_S + 0x0800UL)
1528 #define TIM5_BASE_S (APB1PERIPH_BASE_S + 0x0C00UL)
1529 #define TIM6_BASE_S (APB1PERIPH_BASE_S + 0x1000UL)
1530 #define TIM7_BASE_S (APB1PERIPH_BASE_S + 0x1400UL)
1531 #define RTC_BASE_S (APB1PERIPH_BASE_S + 0x2800UL)
1532 #define WWDG_BASE_S (APB1PERIPH_BASE_S + 0x2C00UL)
1533 #define IWDG_BASE_S (APB1PERIPH_BASE_S + 0x3000UL)
[all …]
Dstm32l562xx.h1599 #define APB1PERIPH_BASE_S PERIPH_BASE_S macro
1606 #define TIM2_BASE_S (APB1PERIPH_BASE_S + 0x0000UL)
1607 #define TIM3_BASE_S (APB1PERIPH_BASE_S + 0x0400UL)
1608 #define TIM4_BASE_S (APB1PERIPH_BASE_S + 0x0800UL)
1609 #define TIM5_BASE_S (APB1PERIPH_BASE_S + 0x0C00UL)
1610 #define TIM6_BASE_S (APB1PERIPH_BASE_S + 0x1000UL)
1611 #define TIM7_BASE_S (APB1PERIPH_BASE_S + 0x1400UL)
1612 #define RTC_BASE_S (APB1PERIPH_BASE_S + 0x2800UL)
1613 #define WWDG_BASE_S (APB1PERIPH_BASE_S + 0x2C00UL)
1614 #define IWDG_BASE_S (APB1PERIPH_BASE_S + 0x3000UL)
[all …]
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h562xx.h1758 #define APB1PERIPH_BASE_S PERIPH_BASE_S macro
1767 #define TIM2_BASE_S (APB1PERIPH_BASE_S + 0x0000UL)
1768 #define TIM3_BASE_S (APB1PERIPH_BASE_S + 0x0400UL)
1769 #define TIM4_BASE_S (APB1PERIPH_BASE_S + 0x0800UL)
1770 #define TIM5_BASE_S (APB1PERIPH_BASE_S + 0x0C00UL)
1771 #define TIM6_BASE_S (APB1PERIPH_BASE_S + 0x1000UL)
1772 #define TIM7_BASE_S (APB1PERIPH_BASE_S + 0x1400UL)
1773 #define TIM12_BASE_S (APB1PERIPH_BASE_S + 0x1800UL)
1774 #define TIM13_BASE_S (APB1PERIPH_BASE_S + 0x1C00UL)
1775 #define TIM14_BASE_S (APB1PERIPH_BASE_S + 0x2000UL)
[all …]
Dstm32h573xx.h2012 #define APB1PERIPH_BASE_S PERIPH_BASE_S macro
2021 #define TIM2_BASE_S (APB1PERIPH_BASE_S + 0x0000UL)
2022 #define TIM3_BASE_S (APB1PERIPH_BASE_S + 0x0400UL)
2023 #define TIM4_BASE_S (APB1PERIPH_BASE_S + 0x0800UL)
2024 #define TIM5_BASE_S (APB1PERIPH_BASE_S + 0x0C00UL)
2025 #define TIM6_BASE_S (APB1PERIPH_BASE_S + 0x1000UL)
2026 #define TIM7_BASE_S (APB1PERIPH_BASE_S + 0x1400UL)
2027 #define TIM12_BASE_S (APB1PERIPH_BASE_S + 0x1800UL)
2028 #define TIM13_BASE_S (APB1PERIPH_BASE_S + 0x1C00UL)
2029 #define TIM14_BASE_S (APB1PERIPH_BASE_S + 0x2000UL)
[all …]
Dstm32h563xx.h1941 #define APB1PERIPH_BASE_S PERIPH_BASE_S macro
1950 #define TIM2_BASE_S (APB1PERIPH_BASE_S + 0x0000UL)
1951 #define TIM3_BASE_S (APB1PERIPH_BASE_S + 0x0400UL)
1952 #define TIM4_BASE_S (APB1PERIPH_BASE_S + 0x0800UL)
1953 #define TIM5_BASE_S (APB1PERIPH_BASE_S + 0x0C00UL)
1954 #define TIM6_BASE_S (APB1PERIPH_BASE_S + 0x1000UL)
1955 #define TIM7_BASE_S (APB1PERIPH_BASE_S + 0x1400UL)
1956 #define TIM12_BASE_S (APB1PERIPH_BASE_S + 0x1800UL)
1957 #define TIM13_BASE_S (APB1PERIPH_BASE_S + 0x1C00UL)
1958 #define TIM14_BASE_S (APB1PERIPH_BASE_S + 0x2000UL)
[all …]
Dstm32h523xx.h1644 #define APB1PERIPH_BASE_S PERIPH_BASE_S macro
1653 #define TIM2_BASE_S (APB1PERIPH_BASE_S + 0x0000UL)
1654 #define TIM3_BASE_S (APB1PERIPH_BASE_S + 0x0400UL)
1655 #define TIM4_BASE_S (APB1PERIPH_BASE_S + 0x0800UL)
1656 #define TIM5_BASE_S (APB1PERIPH_BASE_S + 0x0C00UL)
1657 #define TIM6_BASE_S (APB1PERIPH_BASE_S + 0x1000UL)
1658 #define TIM7_BASE_S (APB1PERIPH_BASE_S + 0x1400UL)
1659 #define TIM12_BASE_S (APB1PERIPH_BASE_S + 0x1800UL)
1660 #define WWDG_BASE_S (APB1PERIPH_BASE_S + 0x2C00UL)
1661 #define IWDG_BASE_S (APB1PERIPH_BASE_S + 0x3000UL)
[all …]
Dstm32h533xx.h1715 #define APB1PERIPH_BASE_S PERIPH_BASE_S macro
1724 #define TIM2_BASE_S (APB1PERIPH_BASE_S + 0x0000UL)
1725 #define TIM3_BASE_S (APB1PERIPH_BASE_S + 0x0400UL)
1726 #define TIM4_BASE_S (APB1PERIPH_BASE_S + 0x0800UL)
1727 #define TIM5_BASE_S (APB1PERIPH_BASE_S + 0x0C00UL)
1728 #define TIM6_BASE_S (APB1PERIPH_BASE_S + 0x1000UL)
1729 #define TIM7_BASE_S (APB1PERIPH_BASE_S + 0x1400UL)
1730 #define TIM12_BASE_S (APB1PERIPH_BASE_S + 0x1800UL)
1731 #define WWDG_BASE_S (APB1PERIPH_BASE_S + 0x2C00UL)
1732 #define IWDG_BASE_S (APB1PERIPH_BASE_S + 0x3000UL)
[all …]
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h1681 #define APB1PERIPH_BASE_S PERIPH_BASE_S macro
1689 #define TIM2_BASE_S (APB1PERIPH_BASE_S + 0x0000UL)
1690 #define TIM3_BASE_S (APB1PERIPH_BASE_S + 0x0400UL)
1691 #define TIM4_BASE_S (APB1PERIPH_BASE_S + 0x0800UL)
1692 #define TIM5_BASE_S (APB1PERIPH_BASE_S + 0x0C00UL)
1693 #define TIM6_BASE_S (APB1PERIPH_BASE_S + 0x1000UL)
1694 #define TIM7_BASE_S (APB1PERIPH_BASE_S + 0x1400UL)
1695 #define WWDG_BASE_S (APB1PERIPH_BASE_S + 0x2C00UL)
1696 #define IWDG_BASE_S (APB1PERIPH_BASE_S + 0x3000UL)
1697 #define SPI2_BASE_S (APB1PERIPH_BASE_S + 0x3800UL)
[all …]
Dstm32u535xx.h1594 #define APB1PERIPH_BASE_S PERIPH_BASE_S macro
1602 #define TIM2_BASE_S (APB1PERIPH_BASE_S + 0x0000UL)
1603 #define TIM3_BASE_S (APB1PERIPH_BASE_S + 0x0400UL)
1604 #define TIM4_BASE_S (APB1PERIPH_BASE_S + 0x0800UL)
1605 #define TIM5_BASE_S (APB1PERIPH_BASE_S + 0x0C00UL)
1606 #define TIM6_BASE_S (APB1PERIPH_BASE_S + 0x1000UL)
1607 #define TIM7_BASE_S (APB1PERIPH_BASE_S + 0x1400UL)
1608 #define WWDG_BASE_S (APB1PERIPH_BASE_S + 0x2C00UL)
1609 #define IWDG_BASE_S (APB1PERIPH_BASE_S + 0x3000UL)
1610 #define SPI2_BASE_S (APB1PERIPH_BASE_S + 0x3800UL)
[all …]
Dstm32u595xx.h1892 #define APB1PERIPH_BASE_S PERIPH_BASE_S macro
1900 #define TIM2_BASE_S (APB1PERIPH_BASE_S + 0x0000UL)
1901 #define TIM3_BASE_S (APB1PERIPH_BASE_S + 0x0400UL)
1902 #define TIM4_BASE_S (APB1PERIPH_BASE_S + 0x0800UL)
1903 #define TIM5_BASE_S (APB1PERIPH_BASE_S + 0x0C00UL)
1904 #define TIM6_BASE_S (APB1PERIPH_BASE_S + 0x1000UL)
1905 #define TIM7_BASE_S (APB1PERIPH_BASE_S + 0x1400UL)
1906 #define WWDG_BASE_S (APB1PERIPH_BASE_S + 0x2C00UL)
1907 #define IWDG_BASE_S (APB1PERIPH_BASE_S + 0x3000UL)
1908 #define SPI2_BASE_S (APB1PERIPH_BASE_S + 0x3800UL)
[all …]
Dstm32u5a5xx.h1985 #define APB1PERIPH_BASE_S PERIPH_BASE_S macro
1993 #define TIM2_BASE_S (APB1PERIPH_BASE_S + 0x0000UL)
1994 #define TIM3_BASE_S (APB1PERIPH_BASE_S + 0x0400UL)
1995 #define TIM4_BASE_S (APB1PERIPH_BASE_S + 0x0800UL)
1996 #define TIM5_BASE_S (APB1PERIPH_BASE_S + 0x0C00UL)
1997 #define TIM6_BASE_S (APB1PERIPH_BASE_S + 0x1000UL)
1998 #define TIM7_BASE_S (APB1PERIPH_BASE_S + 0x1400UL)
1999 #define WWDG_BASE_S (APB1PERIPH_BASE_S + 0x2C00UL)
2000 #define IWDG_BASE_S (APB1PERIPH_BASE_S + 0x3000UL)
2001 #define SPI2_BASE_S (APB1PERIPH_BASE_S + 0x3800UL)
[all …]
Dstm32u5f7xx.h2073 #define APB1PERIPH_BASE_S PERIPH_BASE_S macro
2081 #define TIM2_BASE_S (APB1PERIPH_BASE_S + 0x0000UL)
2082 #define TIM3_BASE_S (APB1PERIPH_BASE_S + 0x0400UL)
2083 #define TIM4_BASE_S (APB1PERIPH_BASE_S + 0x0800UL)
2084 #define TIM5_BASE_S (APB1PERIPH_BASE_S + 0x0C00UL)
2085 #define TIM6_BASE_S (APB1PERIPH_BASE_S + 0x1000UL)
2086 #define TIM7_BASE_S (APB1PERIPH_BASE_S + 0x1400UL)
2087 #define WWDG_BASE_S (APB1PERIPH_BASE_S + 0x2C00UL)
2088 #define IWDG_BASE_S (APB1PERIPH_BASE_S + 0x3000UL)
2089 #define SPI2_BASE_S (APB1PERIPH_BASE_S + 0x3800UL)
[all …]
Dstm32u575xx.h1831 #define APB1PERIPH_BASE_S PERIPH_BASE_S macro
1839 #define TIM2_BASE_S (APB1PERIPH_BASE_S + 0x0000UL)
1840 #define TIM3_BASE_S (APB1PERIPH_BASE_S + 0x0400UL)
1841 #define TIM4_BASE_S (APB1PERIPH_BASE_S + 0x0800UL)
1842 #define TIM5_BASE_S (APB1PERIPH_BASE_S + 0x0C00UL)
1843 #define TIM6_BASE_S (APB1PERIPH_BASE_S + 0x1000UL)
1844 #define TIM7_BASE_S (APB1PERIPH_BASE_S + 0x1400UL)
1845 #define WWDG_BASE_S (APB1PERIPH_BASE_S + 0x2C00UL)
1846 #define IWDG_BASE_S (APB1PERIPH_BASE_S + 0x3000UL)
1847 #define SPI2_BASE_S (APB1PERIPH_BASE_S + 0x3800UL)
[all …]
Dstm32u599xx.h2088 #define APB1PERIPH_BASE_S PERIPH_BASE_S macro
2096 #define TIM2_BASE_S (APB1PERIPH_BASE_S + 0x0000UL)
2097 #define TIM3_BASE_S (APB1PERIPH_BASE_S + 0x0400UL)
2098 #define TIM4_BASE_S (APB1PERIPH_BASE_S + 0x0800UL)
2099 #define TIM5_BASE_S (APB1PERIPH_BASE_S + 0x0C00UL)
2100 #define TIM6_BASE_S (APB1PERIPH_BASE_S + 0x1000UL)
2101 #define TIM7_BASE_S (APB1PERIPH_BASE_S + 0x1400UL)
2102 #define WWDG_BASE_S (APB1PERIPH_BASE_S + 0x2C00UL)
2103 #define IWDG_BASE_S (APB1PERIPH_BASE_S + 0x3000UL)
2104 #define SPI2_BASE_S (APB1PERIPH_BASE_S + 0x3800UL)
[all …]
Dstm32u5g7xx.h2166 #define APB1PERIPH_BASE_S PERIPH_BASE_S macro
2174 #define TIM2_BASE_S (APB1PERIPH_BASE_S + 0x0000UL)
2175 #define TIM3_BASE_S (APB1PERIPH_BASE_S + 0x0400UL)
2176 #define TIM4_BASE_S (APB1PERIPH_BASE_S + 0x0800UL)
2177 #define TIM5_BASE_S (APB1PERIPH_BASE_S + 0x0C00UL)
2178 #define TIM6_BASE_S (APB1PERIPH_BASE_S + 0x1000UL)
2179 #define TIM7_BASE_S (APB1PERIPH_BASE_S + 0x1400UL)
2180 #define WWDG_BASE_S (APB1PERIPH_BASE_S + 0x2C00UL)
2181 #define IWDG_BASE_S (APB1PERIPH_BASE_S + 0x3000UL)
2182 #define SPI2_BASE_S (APB1PERIPH_BASE_S + 0x3800UL)
[all …]
Dstm32u585xx.h1924 #define APB1PERIPH_BASE_S PERIPH_BASE_S macro
1932 #define TIM2_BASE_S (APB1PERIPH_BASE_S + 0x0000UL)
1933 #define TIM3_BASE_S (APB1PERIPH_BASE_S + 0x0400UL)
1934 #define TIM4_BASE_S (APB1PERIPH_BASE_S + 0x0800UL)
1935 #define TIM5_BASE_S (APB1PERIPH_BASE_S + 0x0C00UL)
1936 #define TIM6_BASE_S (APB1PERIPH_BASE_S + 0x1000UL)
1937 #define TIM7_BASE_S (APB1PERIPH_BASE_S + 0x1400UL)
1938 #define WWDG_BASE_S (APB1PERIPH_BASE_S + 0x2C00UL)
1939 #define IWDG_BASE_S (APB1PERIPH_BASE_S + 0x3000UL)
1940 #define SPI2_BASE_S (APB1PERIPH_BASE_S + 0x3800UL)
[all …]
Dstm32u5f9xx.h2180 #define APB1PERIPH_BASE_S PERIPH_BASE_S macro
2188 #define TIM2_BASE_S (APB1PERIPH_BASE_S + 0x0000UL)
2189 #define TIM3_BASE_S (APB1PERIPH_BASE_S + 0x0400UL)
2190 #define TIM4_BASE_S (APB1PERIPH_BASE_S + 0x0800UL)
2191 #define TIM5_BASE_S (APB1PERIPH_BASE_S + 0x0C00UL)
2192 #define TIM6_BASE_S (APB1PERIPH_BASE_S + 0x1000UL)
2193 #define TIM7_BASE_S (APB1PERIPH_BASE_S + 0x1400UL)
2194 #define WWDG_BASE_S (APB1PERIPH_BASE_S + 0x2C00UL)
2195 #define IWDG_BASE_S (APB1PERIPH_BASE_S + 0x3000UL)
2196 #define SPI2_BASE_S (APB1PERIPH_BASE_S + 0x3800UL)
[all …]
Dstm32u5a9xx.h2181 #define APB1PERIPH_BASE_S PERIPH_BASE_S macro
2189 #define TIM2_BASE_S (APB1PERIPH_BASE_S + 0x0000UL)
2190 #define TIM3_BASE_S (APB1PERIPH_BASE_S + 0x0400UL)
2191 #define TIM4_BASE_S (APB1PERIPH_BASE_S + 0x0800UL)
2192 #define TIM5_BASE_S (APB1PERIPH_BASE_S + 0x0C00UL)
2193 #define TIM6_BASE_S (APB1PERIPH_BASE_S + 0x1000UL)
2194 #define TIM7_BASE_S (APB1PERIPH_BASE_S + 0x1400UL)
2195 #define WWDG_BASE_S (APB1PERIPH_BASE_S + 0x2C00UL)
2196 #define IWDG_BASE_S (APB1PERIPH_BASE_S + 0x3000UL)
2197 #define SPI2_BASE_S (APB1PERIPH_BASE_S + 0x3800UL)
[all …]
Dstm32u5g9xx.h2273 #define APB1PERIPH_BASE_S PERIPH_BASE_S macro
2281 #define TIM2_BASE_S (APB1PERIPH_BASE_S + 0x0000UL)
2282 #define TIM3_BASE_S (APB1PERIPH_BASE_S + 0x0400UL)
2283 #define TIM4_BASE_S (APB1PERIPH_BASE_S + 0x0800UL)
2284 #define TIM5_BASE_S (APB1PERIPH_BASE_S + 0x0C00UL)
2285 #define TIM6_BASE_S (APB1PERIPH_BASE_S + 0x1000UL)
2286 #define TIM7_BASE_S (APB1PERIPH_BASE_S + 0x1400UL)
2287 #define WWDG_BASE_S (APB1PERIPH_BASE_S + 0x2C00UL)
2288 #define IWDG_BASE_S (APB1PERIPH_BASE_S + 0x3000UL)
2289 #define SPI2_BASE_S (APB1PERIPH_BASE_S + 0x3800UL)
[all …]
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h3167 #define APB1PERIPH_BASE_S PERIPH_BASE_S macro
3179 #define TIM2_BASE_S (APB1PERIPH_BASE_S + 0x0000UL)
3180 #define TIM3_BASE_S (APB1PERIPH_BASE_S + 0x0400UL)
3181 #define TIM4_BASE_S (APB1PERIPH_BASE_S + 0x0800UL)
3182 #define TIM5_BASE_S (APB1PERIPH_BASE_S + 0x0C00UL)
3183 #define TIM6_BASE_S (APB1PERIPH_BASE_S + 0x1000UL)
3184 #define TIM7_BASE_S (APB1PERIPH_BASE_S + 0x1400UL)
3185 #define TIM12_BASE_S (APB1PERIPH_BASE_S + 0x1800UL)
3186 #define TIM13_BASE_S (APB1PERIPH_BASE_S + 0x1C00UL)
3187 #define TIM14_BASE_S (APB1PERIPH_BASE_S + 0x2000UL)
[all …]
Dstm32n657xx.h3359 #define APB1PERIPH_BASE_S PERIPH_BASE_S macro
3371 #define TIM2_BASE_S (APB1PERIPH_BASE_S + 0x0000UL)
3372 #define TIM3_BASE_S (APB1PERIPH_BASE_S + 0x0400UL)
3373 #define TIM4_BASE_S (APB1PERIPH_BASE_S + 0x0800UL)
3374 #define TIM5_BASE_S (APB1PERIPH_BASE_S + 0x0C00UL)
3375 #define TIM6_BASE_S (APB1PERIPH_BASE_S + 0x1000UL)
3376 #define TIM7_BASE_S (APB1PERIPH_BASE_S + 0x1400UL)
3377 #define TIM12_BASE_S (APB1PERIPH_BASE_S + 0x1800UL)
3378 #define TIM13_BASE_S (APB1PERIPH_BASE_S + 0x1C00UL)
3379 #define TIM14_BASE_S (APB1PERIPH_BASE_S + 0x2000UL)
[all …]
Dstm32n655xx.h3324 #define APB1PERIPH_BASE_S PERIPH_BASE_S macro
3336 #define TIM2_BASE_S (APB1PERIPH_BASE_S + 0x0000UL)
3337 #define TIM3_BASE_S (APB1PERIPH_BASE_S + 0x0400UL)
3338 #define TIM4_BASE_S (APB1PERIPH_BASE_S + 0x0800UL)
3339 #define TIM5_BASE_S (APB1PERIPH_BASE_S + 0x0C00UL)
3340 #define TIM6_BASE_S (APB1PERIPH_BASE_S + 0x1000UL)
3341 #define TIM7_BASE_S (APB1PERIPH_BASE_S + 0x1400UL)
3342 #define TIM12_BASE_S (APB1PERIPH_BASE_S + 0x1800UL)
3343 #define TIM13_BASE_S (APB1PERIPH_BASE_S + 0x1C00UL)
3344 #define TIM14_BASE_S (APB1PERIPH_BASE_S + 0x2000UL)
[all …]
Dstm32n647xx.h3202 #define APB1PERIPH_BASE_S PERIPH_BASE_S macro
3214 #define TIM2_BASE_S (APB1PERIPH_BASE_S + 0x0000UL)
3215 #define TIM3_BASE_S (APB1PERIPH_BASE_S + 0x0400UL)
3216 #define TIM4_BASE_S (APB1PERIPH_BASE_S + 0x0800UL)
3217 #define TIM5_BASE_S (APB1PERIPH_BASE_S + 0x0C00UL)
3218 #define TIM6_BASE_S (APB1PERIPH_BASE_S + 0x1000UL)
3219 #define TIM7_BASE_S (APB1PERIPH_BASE_S + 0x1400UL)
3220 #define TIM12_BASE_S (APB1PERIPH_BASE_S + 0x1800UL)
3221 #define TIM13_BASE_S (APB1PERIPH_BASE_S + 0x1C00UL)
3222 #define TIM14_BASE_S (APB1PERIPH_BASE_S + 0x2000UL)
[all …]
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba52xx.h1107 #define APB1PERIPH_BASE_S PERIPH_BASE_S macro
1116 #define TIM2_BASE_S APB1PERIPH_BASE_S
1117 #define TIM3_BASE_S (APB1PERIPH_BASE_S + 0x0400UL)
1118 #define WWDG_BASE_S (APB1PERIPH_BASE_S + 0x2C00UL)
1119 #define IWDG_BASE_S (APB1PERIPH_BASE_S + 0x3000UL)
1120 #define USART2_BASE_S (APB1PERIPH_BASE_S + 0x4400UL)
1121 #define I2C1_BASE_S (APB1PERIPH_BASE_S + 0x5400UL)
1122 #define LPTIM2_BASE_S (APB1PERIPH_BASE_S + 0x9400UL)
Dstm32wba54xx.h1176 #define APB1PERIPH_BASE_S PERIPH_BASE_S macro
1185 #define TIM2_BASE_S APB1PERIPH_BASE_S
1186 #define TIM3_BASE_S (APB1PERIPH_BASE_S + 0x0400UL)
1187 #define WWDG_BASE_S (APB1PERIPH_BASE_S + 0x2C00UL)
1188 #define IWDG_BASE_S (APB1PERIPH_BASE_S + 0x3000UL)
1189 #define USART2_BASE_S (APB1PERIPH_BASE_S + 0x4400UL)
1190 #define I2C1_BASE_S (APB1PERIPH_BASE_S + 0x5400UL)
1191 #define LPTIM2_BASE_S (APB1PERIPH_BASE_S + 0x9400UL)

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