Lines Matching refs:APB1PERIPH_BASE_S
1831 #define APB1PERIPH_BASE_S PERIPH_BASE_S macro
1839 #define TIM2_BASE_S (APB1PERIPH_BASE_S + 0x0000UL)
1840 #define TIM3_BASE_S (APB1PERIPH_BASE_S + 0x0400UL)
1841 #define TIM4_BASE_S (APB1PERIPH_BASE_S + 0x0800UL)
1842 #define TIM5_BASE_S (APB1PERIPH_BASE_S + 0x0C00UL)
1843 #define TIM6_BASE_S (APB1PERIPH_BASE_S + 0x1000UL)
1844 #define TIM7_BASE_S (APB1PERIPH_BASE_S + 0x1400UL)
1845 #define WWDG_BASE_S (APB1PERIPH_BASE_S + 0x2C00UL)
1846 #define IWDG_BASE_S (APB1PERIPH_BASE_S + 0x3000UL)
1847 #define SPI2_BASE_S (APB1PERIPH_BASE_S + 0x3800UL)
1848 #define USART2_BASE_S (APB1PERIPH_BASE_S + 0x4400UL)
1849 #define USART3_BASE_S (APB1PERIPH_BASE_S + 0x4800UL)
1850 #define UART4_BASE_S (APB1PERIPH_BASE_S + 0x4C00UL)
1851 #define UART5_BASE_S (APB1PERIPH_BASE_S + 0x5000UL)
1852 #define I2C1_BASE_S (APB1PERIPH_BASE_S + 0x5400UL)
1853 #define I2C2_BASE_S (APB1PERIPH_BASE_S + 0x5800UL)
1854 #define I2C4_BASE_S (APB1PERIPH_BASE_S + 0x8400UL)
1855 #define CRS_BASE_S (APB1PERIPH_BASE_S + 0x6000UL)
1856 #define LPTIM2_BASE_S (APB1PERIPH_BASE_S + 0x9400UL)
1857 #define FDCAN1_BASE_S (APB1PERIPH_BASE_S + 0xA400UL)
1858 #define FDCAN_CONFIG_BASE_S (APB1PERIPH_BASE_S + 0xA500UL)
1859 #define SRAMCAN_BASE_S (APB1PERIPH_BASE_S + 0xAC00UL)
1860 #define UCPD1_BASE_S (APB1PERIPH_BASE_S + 0xDC00UL)
2409 #define APB1PERIPH_BASE APB1PERIPH_BASE_S