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Searched refs:ADC_SMPR_SMP1_2 (Results 1 – 25 of 37) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_adc.h762 #define LL_ADC_SAMPLINGTIME_19CYCLES_5 (ADC_SMPR_SMP1_2) /*…
763 #define LL_ADC_SAMPLINGTIME_39CYCLES_5 (ADC_SMPR_SMP1_2 | ADC_SMPR_SMP1_0) /*…
764 #define LL_ADC_SAMPLINGTIME_79CYCLES_5 (ADC_SMPR_SMP1_2 | ADC_SMPR_SMP1_1) /*…
765 #define LL_ADC_SAMPLINGTIME_160CYCLES_5 (ADC_SMPR_SMP1_2 | ADC_SMPR_SMP1_1 | ADC_SMPR_SMP1_0) /*…
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_adc.h886 #define LL_ADC_SAMPLINGTIME_19CYCLES_5 (ADC_SMPR_SMP1_2) /*!< Sampling time 19.5 ADC clock cyc…
887 #define LL_ADC_SAMPLINGTIME_39CYCLES_5 (ADC_SMPR_SMP1_2 \
889 #define LL_ADC_SAMPLINGTIME_79CYCLES_5 (ADC_SMPR_SMP1_2 \
891 #define LL_ADC_SAMPLINGTIME_814CYCLES_5 (ADC_SMPR_SMP1_2 \
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_ll_adc.h925 #define LL_ADC_SAMPLINGTIME_19CYCLES_5 (ADC_SMPR_SMP1_2) /*!< Sampling time 19.5 ADC clock cyc…
926 #define LL_ADC_SAMPLINGTIME_39CYCLES_5 (ADC_SMPR_SMP1_2 \
928 #define LL_ADC_SAMPLINGTIME_79CYCLES_5 (ADC_SMPR_SMP1_2 \
930 #define LL_ADC_SAMPLINGTIME_160CYCLES_5 (ADC_SMPR_SMP1_2 \
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_adc.h944 #define LL_ADC_SAMPLINGTIME_19CYCLES_5 (ADC_SMPR_SMP1_2) /*!< Sampling time 19.5 ADC clock cyc…
945 #define LL_ADC_SAMPLINGTIME_39CYCLES_5 (ADC_SMPR_SMP1_2 \
947 #define LL_ADC_SAMPLINGTIME_79CYCLES_5 (ADC_SMPR_SMP1_2 \
949 #define LL_ADC_SAMPLINGTIME_160CYCLES_5 (ADC_SMPR_SMP1_2 \
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_adc.h945 #define LL_ADC_SAMPLINGTIME_19CYCLES_5 (ADC_SMPR_SMP1_2) /*!< Sampling time 19.5 ADC clock cyc…
946 #define LL_ADC_SAMPLINGTIME_39CYCLES_5 (ADC_SMPR_SMP1_2 \
948 #define LL_ADC_SAMPLINGTIME_79CYCLES_5 (ADC_SMPR_SMP1_2 \
950 #define LL_ADC_SAMPLINGTIME_160CYCLES_5 (ADC_SMPR_SMP1_2 \
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_adc.h1195 #define LL_ADC_SAMPLINGTIME_19CYCLES_5 (ADC_SMPR_SMP1_2) /*…
1196 #define LL_ADC_SAMPLINGTIME_39CYCLES_5 (ADC_SMPR_SMP1_2 | ADC_SMPR_SMP1_0) /*…
1197 #define LL_ADC_SAMPLINGTIME_79CYCLES_5 (ADC_SMPR_SMP1_2 | ADC_SMPR_SMP1_1) /*…
1198 #define LL_ADC_SAMPLINGTIME_160CYCLES_5 (ADC_SMPR_SMP1_2 | ADC_SMPR_SMP1_1 | ADC_SMPR_SMP1_0) /*…
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h852 #define ADC_SMPR_SMP1_2 (0x4UL << ADC_SMPR_SMP1_Pos) /*!< 0x00000004 */ macro
Dstm32c031xx.h856 #define ADC_SMPR_SMP1_2 (0x4UL << ADC_SMPR_SMP1_Pos) /*!< 0x00000004 */ macro
Dstm32c071xx.h933 #define ADC_SMPR_SMP1_2 (0x4UL << ADC_SMPR_SMP1_Pos) /*!< 0x00000004 */ macro
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h897 #define ADC_SMPR_SMP1_2 (0x4UL << ADC_SMPR_SMP1_Pos) /*!< 0x00000004 */ macro
Dstm32g050xx.h916 #define ADC_SMPR_SMP1_2 (0x4UL << ADC_SMPR_SMP1_Pos) /*!< 0x00000004 */ macro
Dstm32g070xx.h919 #define ADC_SMPR_SMP1_2 (0x4UL << ADC_SMPR_SMP1_Pos) /*!< 0x00000004 */ macro
Dstm32g031xx.h940 #define ADC_SMPR_SMP1_2 (0x4UL << ADC_SMPR_SMP1_Pos) /*!< 0x00000004 */ macro
Dstm32g041xx.h987 #define ADC_SMPR_SMP1_2 (0x4UL << ADC_SMPR_SMP1_Pos) /*!< 0x00000004 */ macro
Dstm32g051xx.h1003 #define ADC_SMPR_SMP1_2 (0x4UL << ADC_SMPR_SMP1_Pos) /*!< 0x00000004 */ macro
Dstm32g061xx.h1050 #define ADC_SMPR_SMP1_2 (0x4UL << ADC_SMPR_SMP1_Pos) /*!< 0x00000004 */ macro
Dstm32g071xx.h1052 #define ADC_SMPR_SMP1_2 (0x4UL << ADC_SMPR_SMP1_Pos) /*!< 0x00000004 */ macro
Dstm32g081xx.h1099 #define ADC_SMPR_SMP1_2 (0x4UL << ADC_SMPR_SMP1_Pos) /*!< 0x00000004 */ macro
Dstm32g0b0xx.h1001 #define ADC_SMPR_SMP1_2 (0x4UL << ADC_SMPR_SMP1_Pos) /*!< 0x00000004 */ macro
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h1229 #define ADC_SMPR_SMP1_2 (0x4UL << ADC_SMPR_SMP1_Pos) /*!< 0x00000004 */ macro
Dstm32wle5xx.h1229 #define ADC_SMPR_SMP1_2 (0x4UL << ADC_SMPR_SMP1_Pos) /*!< 0x00000004 */ macro
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h1348 #define ADC_SMPR_SMP1_2 (0x4UL << ADC_SMPR_SMP1_Pos) /*!< 0x00000004 */ macro
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h1139 #define ADC_SMPR_SMP1_2 (0x4UL << ADC_SMPR_SMP1_Pos) /*!< 0x00000004 */ macro
Dstm32u083xx.h1292 #define ADC_SMPR_SMP1_2 (0x4UL << ADC_SMPR_SMP1_Pos) /*!< 0x00000004 */ macro
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h1245 #define ADC_SMPR_SMP1_2 (0x4UL << ADC_SMPR_SMP1_Pos) /*!< 0x00000004 */ macro

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