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Searched refs:ADC_CFGR_AWD1SGL_Pos (Results 1 – 25 of 121) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_adc.h346 #define ADC_CFGR_AWD1SGL_BITOFFSET_POS (ADC_CFGR_AWD1SGL_Pos)
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_adc.h352 #define ADC_CFGR_AWD1SGL_BITOFFSET_POS (ADC_CFGR_AWD1SGL_Pos)
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_adc.h354 #define ADC_CFGR_AWD1SGL_BITOFFSET_POS (ADC_CFGR_AWD1SGL_Pos)
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_adc.h354 #define ADC_CFGR_AWD1SGL_BITOFFSET_POS (ADC_CFGR_AWD1SGL_Pos)
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_adc.h357 #define ADC_CFGR_AWD1SGL_BITOFFSET_POS (ADC_CFGR_AWD1SGL_Pos)
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h932 #define ADC_CFGR_AWD1SGL_Pos (22U) macro
933 #define ADC_CFGR_AWD1SGL_Msk (0x1UL << ADC_CFGR_AWD1SGL_Pos) /*!< 0x00400000 */
Dstm32f318xx.h933 #define ADC_CFGR_AWD1SGL_Pos (22U) macro
934 #define ADC_CFGR_AWD1SGL_Msk (0x1UL << ADC_CFGR_AWD1SGL_Pos) /*!< 0x00400000 */
Dstm32f302x8.h1041 #define ADC_CFGR_AWD1SGL_Pos (22U) macro
1042 #define ADC_CFGR_AWD1SGL_Msk (0x1UL << ADC_CFGR_AWD1SGL_Pos) /*!< 0x00400000 */
Dstm32f328xx.h992 #define ADC_CFGR_AWD1SGL_Pos (22U) macro
993 #define ADC_CFGR_AWD1SGL_Msk (0x1UL << ADC_CFGR_AWD1SGL_Pos) /*!< 0x00400000 */
Dstm32f302xc.h1076 #define ADC_CFGR_AWD1SGL_Pos (22U) macro
1077 #define ADC_CFGR_AWD1SGL_Msk (0x1UL << ADC_CFGR_AWD1SGL_Pos) /*!< 0x00400000 */
Dstm32f303x8.h993 #define ADC_CFGR_AWD1SGL_Pos (22U) macro
994 #define ADC_CFGR_AWD1SGL_Msk (0x1UL << ADC_CFGR_AWD1SGL_Pos) /*!< 0x00400000 */
Dstm32f358xx.h1066 #define ADC_CFGR_AWD1SGL_Pos (22U) macro
1067 #define ADC_CFGR_AWD1SGL_Msk (0x1UL << ADC_CFGR_AWD1SGL_Pos) /*!< 0x00400000 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb50xx.h1147 #define ADC_CFGR_AWD1SGL_Pos (22U) macro
1148 #define ADC_CFGR_AWD1SGL_Msk (0x1UL << ADC_CFGR_AWD1SGL_Pos) /*!< 0x00400000 */
Dstm32wb30xx.h1146 #define ADC_CFGR_AWD1SGL_Pos (22U) macro
1147 #define ADC_CFGR_AWD1SGL_Msk (0x1UL << ADC_CFGR_AWD1SGL_Pos) /*!< 0x00400000 */
Dstm32wb35xx.h1338 #define ADC_CFGR_AWD1SGL_Pos (22U) macro
1339 #define ADC_CFGR_AWD1SGL_Msk (0x1UL << ADC_CFGR_AWD1SGL_Pos) /*!< 0x00400000 */
Dstm32wb55xx.h1384 #define ADC_CFGR_AWD1SGL_Pos (22U) macro
1385 #define ADC_CFGR_AWD1SGL_Msk (0x1UL << ADC_CFGR_AWD1SGL_Pos) /*!< 0x00400000 */
Dstm32wb5mxx.h1384 #define ADC_CFGR_AWD1SGL_Pos (22U) macro
1385 #define ADC_CFGR_AWD1SGL_Msk (0x1UL << ADC_CFGR_AWD1SGL_Pos) /*!< 0x00400000 */
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h1258 #define ADC_CFGR_AWD1SGL_Pos (22U) macro
1259 #define ADC_CFGR_AWD1SGL_Msk (0x1UL << ADC_CFGR_AWD1SGL_Pos) /*!< 0x00400000 */
Dstm32g411xc.h1295 #define ADC_CFGR_AWD1SGL_Pos (22U) macro
1296 #define ADC_CFGR_AWD1SGL_Msk (0x1UL << ADC_CFGR_AWD1SGL_Pos) /*!< 0x00400000 */
Dstm32g441xx.h1416 #define ADC_CFGR_AWD1SGL_Pos (22U) macro
1417 #define ADC_CFGR_AWD1SGL_Msk (0x1UL << ADC_CFGR_AWD1SGL_Pos) /*!< 0x00400000 */
Dstm32gbk1cb.h1368 #define ADC_CFGR_AWD1SGL_Pos (22U) macro
1369 #define ADC_CFGR_AWD1SGL_Msk (0x1UL << ADC_CFGR_AWD1SGL_Pos) /*!< 0x00400000 */
Dstm32g431xx.h1382 #define ADC_CFGR_AWD1SGL_Pos (22U) macro
1383 #define ADC_CFGR_AWD1SGL_Msk (0x1UL << ADC_CFGR_AWD1SGL_Pos) /*!< 0x00400000 */
Dstm32g4a1xx.h1496 #define ADC_CFGR_AWD1SGL_Pos (22U) macro
1497 #define ADC_CFGR_AWD1SGL_Msk (0x1UL << ADC_CFGR_AWD1SGL_Pos) /*!< 0x00400000 */
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h1250 #define ADC_CFGR_AWD1SGL_Pos (22U) macro
1251 #define ADC_CFGR_AWD1SGL_Msk (0x1UL << ADC_CFGR_AWD1SGL_Pos) /*!< 0x00400000 */
Dstm32l412xx.h1215 #define ADC_CFGR_AWD1SGL_Pos (22U) macro
1216 #define ADC_CFGR_AWD1SGL_Msk (0x1UL << ADC_CFGR_AWD1SGL_Pos) /*!< 0x00400000 */

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