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Searched refs:ADC_AWD3TR_LT3_5 (Results 1 – 25 of 40) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h1197 #define ADC_AWD3TR_LT3_5 (0x020UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000020 */ macro
1228 #define ADC_TR3_LT3_5 ADC_AWD3TR_LT3_5
Dstm32c031xx.h1201 #define ADC_AWD3TR_LT3_5 (0x020UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000020 */ macro
1232 #define ADC_TR3_LT3_5 ADC_AWD3TR_LT3_5
Dstm32c071xx.h1278 #define ADC_AWD3TR_LT3_5 (0x020UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000020 */ macro
1309 #define ADC_TR3_LT3_5 ADC_AWD3TR_LT3_5
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h1230 #define ADC_AWD3TR_LT3_5 (0x020UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000020 */ macro
1261 #define ADC_TR3_LT3_5 ADC_AWD3TR_LT3_5
Dstm32g050xx.h1249 #define ADC_AWD3TR_LT3_5 (0x020UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000020 */ macro
1280 #define ADC_TR3_LT3_5 ADC_AWD3TR_LT3_5
Dstm32g070xx.h1252 #define ADC_AWD3TR_LT3_5 (0x020UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000020 */ macro
1283 #define ADC_TR3_LT3_5 ADC_AWD3TR_LT3_5
Dstm32g031xx.h1273 #define ADC_AWD3TR_LT3_5 (0x020UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000020 */ macro
1304 #define ADC_TR3_LT3_5 ADC_AWD3TR_LT3_5
Dstm32g041xx.h1320 #define ADC_AWD3TR_LT3_5 (0x020UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000020 */ macro
1351 #define ADC_TR3_LT3_5 ADC_AWD3TR_LT3_5
Dstm32g051xx.h1336 #define ADC_AWD3TR_LT3_5 (0x020UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000020 */ macro
1367 #define ADC_TR3_LT3_5 ADC_AWD3TR_LT3_5
Dstm32g061xx.h1383 #define ADC_AWD3TR_LT3_5 (0x020UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000020 */ macro
1414 #define ADC_TR3_LT3_5 ADC_AWD3TR_LT3_5
Dstm32g071xx.h1385 #define ADC_AWD3TR_LT3_5 (0x020UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000020 */ macro
1416 #define ADC_TR3_LT3_5 ADC_AWD3TR_LT3_5
Dstm32g081xx.h1432 #define ADC_AWD3TR_LT3_5 (0x020UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000020 */ macro
1463 #define ADC_TR3_LT3_5 ADC_AWD3TR_LT3_5
Dstm32g0b0xx.h1334 #define ADC_AWD3TR_LT3_5 (0x020UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000020 */ macro
1365 #define ADC_TR3_LT3_5 ADC_AWD3TR_LT3_5
Dstm32g0c1xx.h1599 #define ADC_AWD3TR_LT3_5 (0x020UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000020 */ macro
1630 #define ADC_TR3_LT3_5 ADC_AWD3TR_LT3_5
Dstm32g0b1xx.h1552 #define ADC_AWD3TR_LT3_5 (0x020UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000020 */ macro
1583 #define ADC_TR3_LT3_5 ADC_AWD3TR_LT3_5
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h1556 #define ADC_AWD3TR_LT3_5 (0x020UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000020 */ macro
1587 #define ADC_TR3_LT3_5 ADC_AWD3TR_LT3_5
Dstm32wle5xx.h1556 #define ADC_AWD3TR_LT3_5 (0x020UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000020 */ macro
1587 #define ADC_TR3_LT3_5 ADC_AWD3TR_LT3_5
Dstm32wl5mxx.h1738 #define ADC_AWD3TR_LT3_5 (0x020UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000020 */ macro
1769 #define ADC_TR3_LT3_5 ADC_AWD3TR_LT3_5
Dstm32wl54xx.h1738 #define ADC_AWD3TR_LT3_5 (0x020UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000020 */ macro
1769 #define ADC_TR3_LT3_5 ADC_AWD3TR_LT3_5
Dstm32wl55xx.h1738 #define ADC_AWD3TR_LT3_5 (0x020UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000020 */ macro
1769 #define ADC_TR3_LT3_5 ADC_AWD3TR_LT3_5
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h1617 #define ADC_AWD3TR_LT3_5 (0x020UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000020 */ macro
Dstm32wba52xx.h2098 #define ADC_AWD3TR_LT3_5 (0x020UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000020 */ macro
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h1429 #define ADC_AWD3TR_LT3_5 (0x020UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000020 */ macro
Dstm32u083xx.h1582 #define ADC_AWD3TR_LT3_5 (0x020UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000020 */ macro
Dstm32u073xx.h1546 #define ADC_AWD3TR_LT3_5 (0x020UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000020 */ macro

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