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Searched refs:ADC_AWD3TR_LT3_2 (Results 1 – 25 of 40) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h1194 #define ADC_AWD3TR_LT3_2 (0x004UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000004 */ macro
1225 #define ADC_TR3_LT3_2 ADC_AWD3TR_LT3_2
Dstm32c031xx.h1198 #define ADC_AWD3TR_LT3_2 (0x004UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000004 */ macro
1229 #define ADC_TR3_LT3_2 ADC_AWD3TR_LT3_2
Dstm32c071xx.h1275 #define ADC_AWD3TR_LT3_2 (0x004UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000004 */ macro
1306 #define ADC_TR3_LT3_2 ADC_AWD3TR_LT3_2
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h1227 #define ADC_AWD3TR_LT3_2 (0x004UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000004 */ macro
1258 #define ADC_TR3_LT3_2 ADC_AWD3TR_LT3_2
Dstm32g050xx.h1246 #define ADC_AWD3TR_LT3_2 (0x004UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000004 */ macro
1277 #define ADC_TR3_LT3_2 ADC_AWD3TR_LT3_2
Dstm32g070xx.h1249 #define ADC_AWD3TR_LT3_2 (0x004UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000004 */ macro
1280 #define ADC_TR3_LT3_2 ADC_AWD3TR_LT3_2
Dstm32g031xx.h1270 #define ADC_AWD3TR_LT3_2 (0x004UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000004 */ macro
1301 #define ADC_TR3_LT3_2 ADC_AWD3TR_LT3_2
Dstm32g041xx.h1317 #define ADC_AWD3TR_LT3_2 (0x004UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000004 */ macro
1348 #define ADC_TR3_LT3_2 ADC_AWD3TR_LT3_2
Dstm32g051xx.h1333 #define ADC_AWD3TR_LT3_2 (0x004UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000004 */ macro
1364 #define ADC_TR3_LT3_2 ADC_AWD3TR_LT3_2
Dstm32g061xx.h1380 #define ADC_AWD3TR_LT3_2 (0x004UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000004 */ macro
1411 #define ADC_TR3_LT3_2 ADC_AWD3TR_LT3_2
Dstm32g071xx.h1382 #define ADC_AWD3TR_LT3_2 (0x004UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000004 */ macro
1413 #define ADC_TR3_LT3_2 ADC_AWD3TR_LT3_2
Dstm32g081xx.h1429 #define ADC_AWD3TR_LT3_2 (0x004UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000004 */ macro
1460 #define ADC_TR3_LT3_2 ADC_AWD3TR_LT3_2
Dstm32g0b0xx.h1331 #define ADC_AWD3TR_LT3_2 (0x004UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000004 */ macro
1362 #define ADC_TR3_LT3_2 ADC_AWD3TR_LT3_2
Dstm32g0c1xx.h1596 #define ADC_AWD3TR_LT3_2 (0x004UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000004 */ macro
1627 #define ADC_TR3_LT3_2 ADC_AWD3TR_LT3_2
Dstm32g0b1xx.h1549 #define ADC_AWD3TR_LT3_2 (0x004UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000004 */ macro
1580 #define ADC_TR3_LT3_2 ADC_AWD3TR_LT3_2
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h1553 #define ADC_AWD3TR_LT3_2 (0x004UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000004 */ macro
1584 #define ADC_TR3_LT3_2 ADC_AWD3TR_LT3_2
Dstm32wle5xx.h1553 #define ADC_AWD3TR_LT3_2 (0x004UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000004 */ macro
1584 #define ADC_TR3_LT3_2 ADC_AWD3TR_LT3_2
Dstm32wl5mxx.h1735 #define ADC_AWD3TR_LT3_2 (0x004UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000004 */ macro
1766 #define ADC_TR3_LT3_2 ADC_AWD3TR_LT3_2
Dstm32wl54xx.h1735 #define ADC_AWD3TR_LT3_2 (0x004UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000004 */ macro
1766 #define ADC_TR3_LT3_2 ADC_AWD3TR_LT3_2
Dstm32wl55xx.h1735 #define ADC_AWD3TR_LT3_2 (0x004UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000004 */ macro
1766 #define ADC_TR3_LT3_2 ADC_AWD3TR_LT3_2
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h1614 #define ADC_AWD3TR_LT3_2 (0x004UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000004 */ macro
Dstm32wba52xx.h2095 #define ADC_AWD3TR_LT3_2 (0x004UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000004 */ macro
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h1426 #define ADC_AWD3TR_LT3_2 (0x004UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000004 */ macro
Dstm32u083xx.h1579 #define ADC_AWD3TR_LT3_2 (0x004UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000004 */ macro
Dstm32u073xx.h1543 #define ADC_AWD3TR_LT3_2 (0x004UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000004 */ macro

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