/hal_stm32-latest/stm32cube/stm32c0xx/soc/ |
D | stm32c011xx.h | 1193 #define ADC_AWD3TR_LT3_1 (0x002UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000002 */ macro 1224 #define ADC_TR3_LT3_1 ADC_AWD3TR_LT3_1
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D | stm32c031xx.h | 1197 #define ADC_AWD3TR_LT3_1 (0x002UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000002 */ macro 1228 #define ADC_TR3_LT3_1 ADC_AWD3TR_LT3_1
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D | stm32c071xx.h | 1274 #define ADC_AWD3TR_LT3_1 (0x002UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000002 */ macro 1305 #define ADC_TR3_LT3_1 ADC_AWD3TR_LT3_1
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/hal_stm32-latest/stm32cube/stm32g0xx/soc/ |
D | stm32g030xx.h | 1226 #define ADC_AWD3TR_LT3_1 (0x002UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000002 */ macro 1257 #define ADC_TR3_LT3_1 ADC_AWD3TR_LT3_1
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D | stm32g050xx.h | 1245 #define ADC_AWD3TR_LT3_1 (0x002UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000002 */ macro 1276 #define ADC_TR3_LT3_1 ADC_AWD3TR_LT3_1
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D | stm32g070xx.h | 1248 #define ADC_AWD3TR_LT3_1 (0x002UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000002 */ macro 1279 #define ADC_TR3_LT3_1 ADC_AWD3TR_LT3_1
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D | stm32g031xx.h | 1269 #define ADC_AWD3TR_LT3_1 (0x002UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000002 */ macro 1300 #define ADC_TR3_LT3_1 ADC_AWD3TR_LT3_1
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D | stm32g041xx.h | 1316 #define ADC_AWD3TR_LT3_1 (0x002UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000002 */ macro 1347 #define ADC_TR3_LT3_1 ADC_AWD3TR_LT3_1
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D | stm32g051xx.h | 1332 #define ADC_AWD3TR_LT3_1 (0x002UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000002 */ macro 1363 #define ADC_TR3_LT3_1 ADC_AWD3TR_LT3_1
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D | stm32g061xx.h | 1379 #define ADC_AWD3TR_LT3_1 (0x002UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000002 */ macro 1410 #define ADC_TR3_LT3_1 ADC_AWD3TR_LT3_1
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D | stm32g071xx.h | 1381 #define ADC_AWD3TR_LT3_1 (0x002UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000002 */ macro 1412 #define ADC_TR3_LT3_1 ADC_AWD3TR_LT3_1
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D | stm32g081xx.h | 1428 #define ADC_AWD3TR_LT3_1 (0x002UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000002 */ macro 1459 #define ADC_TR3_LT3_1 ADC_AWD3TR_LT3_1
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D | stm32g0b0xx.h | 1330 #define ADC_AWD3TR_LT3_1 (0x002UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000002 */ macro 1361 #define ADC_TR3_LT3_1 ADC_AWD3TR_LT3_1
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D | stm32g0c1xx.h | 1595 #define ADC_AWD3TR_LT3_1 (0x002UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000002 */ macro 1626 #define ADC_TR3_LT3_1 ADC_AWD3TR_LT3_1
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D | stm32g0b1xx.h | 1548 #define ADC_AWD3TR_LT3_1 (0x002UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000002 */ macro 1579 #define ADC_TR3_LT3_1 ADC_AWD3TR_LT3_1
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/hal_stm32-latest/stm32cube/stm32wlxx/soc/ |
D | stm32wle4xx.h | 1552 #define ADC_AWD3TR_LT3_1 (0x002UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000002 */ macro 1583 #define ADC_TR3_LT3_1 ADC_AWD3TR_LT3_1
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D | stm32wle5xx.h | 1552 #define ADC_AWD3TR_LT3_1 (0x002UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000002 */ macro 1583 #define ADC_TR3_LT3_1 ADC_AWD3TR_LT3_1
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D | stm32wl5mxx.h | 1734 #define ADC_AWD3TR_LT3_1 (0x002UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000002 */ macro 1765 #define ADC_TR3_LT3_1 ADC_AWD3TR_LT3_1
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D | stm32wl54xx.h | 1734 #define ADC_AWD3TR_LT3_1 (0x002UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000002 */ macro 1765 #define ADC_TR3_LT3_1 ADC_AWD3TR_LT3_1
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D | stm32wl55xx.h | 1734 #define ADC_AWD3TR_LT3_1 (0x002UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000002 */ macro 1765 #define ADC_TR3_LT3_1 ADC_AWD3TR_LT3_1
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/hal_stm32-latest/stm32cube/stm32wbaxx/soc/ |
D | stm32wba50xx.h | 1613 #define ADC_AWD3TR_LT3_1 (0x002UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000002 */ macro
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D | stm32wba52xx.h | 2094 #define ADC_AWD3TR_LT3_1 (0x002UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000002 */ macro
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/hal_stm32-latest/stm32cube/stm32u0xx/soc/ |
D | stm32u031xx.h | 1425 #define ADC_AWD3TR_LT3_1 (0x002UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000002 */ macro
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D | stm32u083xx.h | 1578 #define ADC_AWD3TR_LT3_1 (0x002UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000002 */ macro
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D | stm32u073xx.h | 1542 #define ADC_AWD3TR_LT3_1 (0x002UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000002 */ macro
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