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Searched refs:ADC_AWD3TR_LT3_0 (Results 1 – 25 of 40) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h1192 #define ADC_AWD3TR_LT3_0 (0x001UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000001 */ macro
1223 #define ADC_TR3_LT3_0 ADC_AWD3TR_LT3_0
Dstm32c031xx.h1196 #define ADC_AWD3TR_LT3_0 (0x001UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000001 */ macro
1227 #define ADC_TR3_LT3_0 ADC_AWD3TR_LT3_0
Dstm32c071xx.h1273 #define ADC_AWD3TR_LT3_0 (0x001UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000001 */ macro
1304 #define ADC_TR3_LT3_0 ADC_AWD3TR_LT3_0
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h1225 #define ADC_AWD3TR_LT3_0 (0x001UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000001 */ macro
1256 #define ADC_TR3_LT3_0 ADC_AWD3TR_LT3_0
Dstm32g050xx.h1244 #define ADC_AWD3TR_LT3_0 (0x001UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000001 */ macro
1275 #define ADC_TR3_LT3_0 ADC_AWD3TR_LT3_0
Dstm32g070xx.h1247 #define ADC_AWD3TR_LT3_0 (0x001UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000001 */ macro
1278 #define ADC_TR3_LT3_0 ADC_AWD3TR_LT3_0
Dstm32g031xx.h1268 #define ADC_AWD3TR_LT3_0 (0x001UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000001 */ macro
1299 #define ADC_TR3_LT3_0 ADC_AWD3TR_LT3_0
Dstm32g041xx.h1315 #define ADC_AWD3TR_LT3_0 (0x001UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000001 */ macro
1346 #define ADC_TR3_LT3_0 ADC_AWD3TR_LT3_0
Dstm32g051xx.h1331 #define ADC_AWD3TR_LT3_0 (0x001UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000001 */ macro
1362 #define ADC_TR3_LT3_0 ADC_AWD3TR_LT3_0
Dstm32g061xx.h1378 #define ADC_AWD3TR_LT3_0 (0x001UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000001 */ macro
1409 #define ADC_TR3_LT3_0 ADC_AWD3TR_LT3_0
Dstm32g071xx.h1380 #define ADC_AWD3TR_LT3_0 (0x001UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000001 */ macro
1411 #define ADC_TR3_LT3_0 ADC_AWD3TR_LT3_0
Dstm32g081xx.h1427 #define ADC_AWD3TR_LT3_0 (0x001UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000001 */ macro
1458 #define ADC_TR3_LT3_0 ADC_AWD3TR_LT3_0
Dstm32g0b0xx.h1329 #define ADC_AWD3TR_LT3_0 (0x001UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000001 */ macro
1360 #define ADC_TR3_LT3_0 ADC_AWD3TR_LT3_0
Dstm32g0c1xx.h1594 #define ADC_AWD3TR_LT3_0 (0x001UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000001 */ macro
1625 #define ADC_TR3_LT3_0 ADC_AWD3TR_LT3_0
Dstm32g0b1xx.h1547 #define ADC_AWD3TR_LT3_0 (0x001UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000001 */ macro
1578 #define ADC_TR3_LT3_0 ADC_AWD3TR_LT3_0
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h1551 #define ADC_AWD3TR_LT3_0 (0x001UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000001 */ macro
1582 #define ADC_TR3_LT3_0 ADC_AWD3TR_LT3_0
Dstm32wle5xx.h1551 #define ADC_AWD3TR_LT3_0 (0x001UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000001 */ macro
1582 #define ADC_TR3_LT3_0 ADC_AWD3TR_LT3_0
Dstm32wl5mxx.h1733 #define ADC_AWD3TR_LT3_0 (0x001UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000001 */ macro
1764 #define ADC_TR3_LT3_0 ADC_AWD3TR_LT3_0
Dstm32wl54xx.h1733 #define ADC_AWD3TR_LT3_0 (0x001UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000001 */ macro
1764 #define ADC_TR3_LT3_0 ADC_AWD3TR_LT3_0
Dstm32wl55xx.h1733 #define ADC_AWD3TR_LT3_0 (0x001UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000001 */ macro
1764 #define ADC_TR3_LT3_0 ADC_AWD3TR_LT3_0
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h1612 #define ADC_AWD3TR_LT3_0 (0x001UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000001 */ macro
Dstm32wba52xx.h2093 #define ADC_AWD3TR_LT3_0 (0x001UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000001 */ macro
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h1424 #define ADC_AWD3TR_LT3_0 (0x001UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000001 */ macro
Dstm32u083xx.h1577 #define ADC_AWD3TR_LT3_0 (0x001UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000001 */ macro
Dstm32u073xx.h1541 #define ADC_AWD3TR_LT3_0 (0x001UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000001 */ macro

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