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Searched refs:ADC_AWD2TR_LT2_5 (Results 1 – 25 of 40) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h993 #define ADC_AWD2TR_LT2_5 (0x020UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000020 */ macro
1024 #define ADC_TR2_LT2_5 ADC_AWD2TR_LT2_5
Dstm32c031xx.h997 #define ADC_AWD2TR_LT2_5 (0x020UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000020 */ macro
1028 #define ADC_TR2_LT2_5 ADC_AWD2TR_LT2_5
Dstm32c071xx.h1074 #define ADC_AWD2TR_LT2_5 (0x020UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000020 */ macro
1105 #define ADC_TR2_LT2_5 ADC_AWD2TR_LT2_5
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h1038 #define ADC_AWD2TR_LT2_5 (0x020UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000020 */ macro
1069 #define ADC_TR2_LT2_5 ADC_AWD2TR_LT2_5
Dstm32g050xx.h1057 #define ADC_AWD2TR_LT2_5 (0x020UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000020 */ macro
1088 #define ADC_TR2_LT2_5 ADC_AWD2TR_LT2_5
Dstm32g070xx.h1060 #define ADC_AWD2TR_LT2_5 (0x020UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000020 */ macro
1091 #define ADC_TR2_LT2_5 ADC_AWD2TR_LT2_5
Dstm32g031xx.h1081 #define ADC_AWD2TR_LT2_5 (0x020UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000020 */ macro
1112 #define ADC_TR2_LT2_5 ADC_AWD2TR_LT2_5
Dstm32g041xx.h1128 #define ADC_AWD2TR_LT2_5 (0x020UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000020 */ macro
1159 #define ADC_TR2_LT2_5 ADC_AWD2TR_LT2_5
Dstm32g051xx.h1144 #define ADC_AWD2TR_LT2_5 (0x020UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000020 */ macro
1175 #define ADC_TR2_LT2_5 ADC_AWD2TR_LT2_5
Dstm32g061xx.h1191 #define ADC_AWD2TR_LT2_5 (0x020UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000020 */ macro
1222 #define ADC_TR2_LT2_5 ADC_AWD2TR_LT2_5
Dstm32g071xx.h1193 #define ADC_AWD2TR_LT2_5 (0x020UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000020 */ macro
1224 #define ADC_TR2_LT2_5 ADC_AWD2TR_LT2_5
Dstm32g081xx.h1240 #define ADC_AWD2TR_LT2_5 (0x020UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000020 */ macro
1271 #define ADC_TR2_LT2_5 ADC_AWD2TR_LT2_5
Dstm32g0b0xx.h1142 #define ADC_AWD2TR_LT2_5 (0x020UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000020 */ macro
1173 #define ADC_TR2_LT2_5 ADC_AWD2TR_LT2_5
Dstm32g0c1xx.h1407 #define ADC_AWD2TR_LT2_5 (0x020UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000020 */ macro
1438 #define ADC_TR2_LT2_5 ADC_AWD2TR_LT2_5
Dstm32g0b1xx.h1360 #define ADC_AWD2TR_LT2_5 (0x020UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000020 */ macro
1391 #define ADC_TR2_LT2_5 ADC_AWD2TR_LT2_5
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h1367 #define ADC_AWD2TR_LT2_5 (0x020UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000020 */ macro
1398 #define ADC_TR2_LT2_5 ADC_AWD2TR_LT2_5
Dstm32wle5xx.h1367 #define ADC_AWD2TR_LT2_5 (0x020UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000020 */ macro
1398 #define ADC_TR2_LT2_5 ADC_AWD2TR_LT2_5
Dstm32wl5mxx.h1549 #define ADC_AWD2TR_LT2_5 (0x020UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000020 */ macro
1580 #define ADC_TR2_LT2_5 ADC_AWD2TR_LT2_5
Dstm32wl54xx.h1549 #define ADC_AWD2TR_LT2_5 (0x020UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000020 */ macro
1580 #define ADC_TR2_LT2_5 ADC_AWD2TR_LT2_5
Dstm32wl55xx.h1549 #define ADC_AWD2TR_LT2_5 (0x020UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000020 */ macro
1580 #define ADC_TR2_LT2_5 ADC_AWD2TR_LT2_5
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h1457 #define ADC_AWD2TR_LT2_5 (0x020UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000020 */ macro
Dstm32wba52xx.h1938 #define ADC_AWD2TR_LT2_5 (0x020UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000020 */ macro
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h1254 #define ADC_AWD2TR_LT2_5 (0x020UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000020 */ macro
Dstm32u083xx.h1407 #define ADC_AWD2TR_LT2_5 (0x020UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000020 */ macro
Dstm32u073xx.h1371 #define ADC_AWD2TR_LT2_5 (0x020UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000020 */ macro

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