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Searched refs:ADC_AWD2TR_LT2_0 (Results 1 – 25 of 40) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h988 #define ADC_AWD2TR_LT2_0 (0x001UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000001 */ macro
1019 #define ADC_TR2_LT2_0 ADC_AWD2TR_LT2_0
Dstm32c031xx.h992 #define ADC_AWD2TR_LT2_0 (0x001UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000001 */ macro
1023 #define ADC_TR2_LT2_0 ADC_AWD2TR_LT2_0
Dstm32c071xx.h1069 #define ADC_AWD2TR_LT2_0 (0x001UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000001 */ macro
1100 #define ADC_TR2_LT2_0 ADC_AWD2TR_LT2_0
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h1033 #define ADC_AWD2TR_LT2_0 (0x001UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000001 */ macro
1064 #define ADC_TR2_LT2_0 ADC_AWD2TR_LT2_0
Dstm32g050xx.h1052 #define ADC_AWD2TR_LT2_0 (0x001UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000001 */ macro
1083 #define ADC_TR2_LT2_0 ADC_AWD2TR_LT2_0
Dstm32g070xx.h1055 #define ADC_AWD2TR_LT2_0 (0x001UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000001 */ macro
1086 #define ADC_TR2_LT2_0 ADC_AWD2TR_LT2_0
Dstm32g031xx.h1076 #define ADC_AWD2TR_LT2_0 (0x001UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000001 */ macro
1107 #define ADC_TR2_LT2_0 ADC_AWD2TR_LT2_0
Dstm32g041xx.h1123 #define ADC_AWD2TR_LT2_0 (0x001UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000001 */ macro
1154 #define ADC_TR2_LT2_0 ADC_AWD2TR_LT2_0
Dstm32g051xx.h1139 #define ADC_AWD2TR_LT2_0 (0x001UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000001 */ macro
1170 #define ADC_TR2_LT2_0 ADC_AWD2TR_LT2_0
Dstm32g061xx.h1186 #define ADC_AWD2TR_LT2_0 (0x001UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000001 */ macro
1217 #define ADC_TR2_LT2_0 ADC_AWD2TR_LT2_0
Dstm32g071xx.h1188 #define ADC_AWD2TR_LT2_0 (0x001UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000001 */ macro
1219 #define ADC_TR2_LT2_0 ADC_AWD2TR_LT2_0
Dstm32g081xx.h1235 #define ADC_AWD2TR_LT2_0 (0x001UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000001 */ macro
1266 #define ADC_TR2_LT2_0 ADC_AWD2TR_LT2_0
Dstm32g0b0xx.h1137 #define ADC_AWD2TR_LT2_0 (0x001UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000001 */ macro
1168 #define ADC_TR2_LT2_0 ADC_AWD2TR_LT2_0
Dstm32g0c1xx.h1402 #define ADC_AWD2TR_LT2_0 (0x001UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000001 */ macro
1433 #define ADC_TR2_LT2_0 ADC_AWD2TR_LT2_0
Dstm32g0b1xx.h1355 #define ADC_AWD2TR_LT2_0 (0x001UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000001 */ macro
1386 #define ADC_TR2_LT2_0 ADC_AWD2TR_LT2_0
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h1362 #define ADC_AWD2TR_LT2_0 (0x001UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000001 */ macro
1393 #define ADC_TR2_LT2_0 ADC_AWD2TR_LT2_0
Dstm32wle5xx.h1362 #define ADC_AWD2TR_LT2_0 (0x001UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000001 */ macro
1393 #define ADC_TR2_LT2_0 ADC_AWD2TR_LT2_0
Dstm32wl5mxx.h1544 #define ADC_AWD2TR_LT2_0 (0x001UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000001 */ macro
1575 #define ADC_TR2_LT2_0 ADC_AWD2TR_LT2_0
Dstm32wl54xx.h1544 #define ADC_AWD2TR_LT2_0 (0x001UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000001 */ macro
1575 #define ADC_TR2_LT2_0 ADC_AWD2TR_LT2_0
Dstm32wl55xx.h1544 #define ADC_AWD2TR_LT2_0 (0x001UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000001 */ macro
1575 #define ADC_TR2_LT2_0 ADC_AWD2TR_LT2_0
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h1452 #define ADC_AWD2TR_LT2_0 (0x001UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000001 */ macro
Dstm32wba52xx.h1933 #define ADC_AWD2TR_LT2_0 (0x001UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000001 */ macro
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h1249 #define ADC_AWD2TR_LT2_0 (0x001UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000001 */ macro
Dstm32u083xx.h1402 #define ADC_AWD2TR_LT2_0 (0x001UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000001 */ macro
Dstm32u073xx.h1366 #define ADC_AWD2TR_LT2_0 (0x001UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000001 */ macro

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