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Searched refs:ADC_AWD1TR_LT1_9 (Results 1 – 25 of 40) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h935 #define ADC_AWD1TR_LT1_9 (0x200UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000200 */ macro
966 #define ADC_TR1_LT1_9 ADC_AWD1TR_LT1_9
Dstm32c031xx.h939 #define ADC_AWD1TR_LT1_9 (0x200UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000200 */ macro
970 #define ADC_TR1_LT1_9 ADC_AWD1TR_LT1_9
Dstm32c071xx.h1016 #define ADC_AWD1TR_LT1_9 (0x200UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000200 */ macro
1047 #define ADC_TR1_LT1_9 ADC_AWD1TR_LT1_9
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h980 #define ADC_AWD1TR_LT1_9 (0x200UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000200 */ macro
1011 #define ADC_TR1_LT1_9 ADC_AWD1TR_LT1_9
Dstm32g050xx.h999 #define ADC_AWD1TR_LT1_9 (0x200UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000200 */ macro
1030 #define ADC_TR1_LT1_9 ADC_AWD1TR_LT1_9
Dstm32g070xx.h1002 #define ADC_AWD1TR_LT1_9 (0x200UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000200 */ macro
1033 #define ADC_TR1_LT1_9 ADC_AWD1TR_LT1_9
Dstm32g031xx.h1023 #define ADC_AWD1TR_LT1_9 (0x200UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000200 */ macro
1054 #define ADC_TR1_LT1_9 ADC_AWD1TR_LT1_9
Dstm32g041xx.h1070 #define ADC_AWD1TR_LT1_9 (0x200UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000200 */ macro
1101 #define ADC_TR1_LT1_9 ADC_AWD1TR_LT1_9
Dstm32g051xx.h1086 #define ADC_AWD1TR_LT1_9 (0x200UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000200 */ macro
1117 #define ADC_TR1_LT1_9 ADC_AWD1TR_LT1_9
Dstm32g061xx.h1133 #define ADC_AWD1TR_LT1_9 (0x200UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000200 */ macro
1164 #define ADC_TR1_LT1_9 ADC_AWD1TR_LT1_9
Dstm32g071xx.h1135 #define ADC_AWD1TR_LT1_9 (0x200UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000200 */ macro
1166 #define ADC_TR1_LT1_9 ADC_AWD1TR_LT1_9
Dstm32g081xx.h1182 #define ADC_AWD1TR_LT1_9 (0x200UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000200 */ macro
1213 #define ADC_TR1_LT1_9 ADC_AWD1TR_LT1_9
Dstm32g0b0xx.h1084 #define ADC_AWD1TR_LT1_9 (0x200UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000200 */ macro
1115 #define ADC_TR1_LT1_9 ADC_AWD1TR_LT1_9
Dstm32g0c1xx.h1349 #define ADC_AWD1TR_LT1_9 (0x200UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000200 */ macro
1380 #define ADC_TR1_LT1_9 ADC_AWD1TR_LT1_9
Dstm32g0b1xx.h1302 #define ADC_AWD1TR_LT1_9 (0x200UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000200 */ macro
1333 #define ADC_TR1_LT1_9 ADC_AWD1TR_LT1_9
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h1309 #define ADC_AWD1TR_LT1_9 (0x200UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000200 */ macro
1340 #define ADC_TR1_LT1_9 ADC_AWD1TR_LT1_9
Dstm32wle5xx.h1309 #define ADC_AWD1TR_LT1_9 (0x200UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000200 */ macro
1340 #define ADC_TR1_LT1_9 ADC_AWD1TR_LT1_9
Dstm32wl5mxx.h1491 #define ADC_AWD1TR_LT1_9 (0x200UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000200 */ macro
1522 #define ADC_TR1_LT1_9 ADC_AWD1TR_LT1_9
Dstm32wl54xx.h1491 #define ADC_AWD1TR_LT1_9 (0x200UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000200 */ macro
1522 #define ADC_TR1_LT1_9 ADC_AWD1TR_LT1_9
Dstm32wl55xx.h1491 #define ADC_AWD1TR_LT1_9 (0x200UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000200 */ macro
1522 #define ADC_TR1_LT1_9 ADC_AWD1TR_LT1_9
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h1428 #define ADC_AWD1TR_LT1_9 (0x200UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000200 */ macro
Dstm32wba52xx.h1909 #define ADC_AWD1TR_LT1_9 (0x200UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000200 */ macro
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h1225 #define ADC_AWD1TR_LT1_9 (0x200UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000200 */ macro
Dstm32u083xx.h1378 #define ADC_AWD1TR_LT1_9 (0x200UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000200 */ macro
Dstm32u073xx.h1342 #define ADC_AWD1TR_LT1_9 (0x200UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000200 */ macro

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