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Searched refs:ADC_AWD1TR_LT1_7 (Results 1 – 25 of 40) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h933 #define ADC_AWD1TR_LT1_7 (0x080UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000080 */ macro
964 #define ADC_TR1_LT1_7 ADC_AWD1TR_LT1_7
Dstm32c031xx.h937 #define ADC_AWD1TR_LT1_7 (0x080UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000080 */ macro
968 #define ADC_TR1_LT1_7 ADC_AWD1TR_LT1_7
Dstm32c071xx.h1014 #define ADC_AWD1TR_LT1_7 (0x080UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000080 */ macro
1045 #define ADC_TR1_LT1_7 ADC_AWD1TR_LT1_7
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h978 #define ADC_AWD1TR_LT1_7 (0x080UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000080 */ macro
1009 #define ADC_TR1_LT1_7 ADC_AWD1TR_LT1_7
Dstm32g050xx.h997 #define ADC_AWD1TR_LT1_7 (0x080UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000080 */ macro
1028 #define ADC_TR1_LT1_7 ADC_AWD1TR_LT1_7
Dstm32g070xx.h1000 #define ADC_AWD1TR_LT1_7 (0x080UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000080 */ macro
1031 #define ADC_TR1_LT1_7 ADC_AWD1TR_LT1_7
Dstm32g031xx.h1021 #define ADC_AWD1TR_LT1_7 (0x080UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000080 */ macro
1052 #define ADC_TR1_LT1_7 ADC_AWD1TR_LT1_7
Dstm32g041xx.h1068 #define ADC_AWD1TR_LT1_7 (0x080UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000080 */ macro
1099 #define ADC_TR1_LT1_7 ADC_AWD1TR_LT1_7
Dstm32g051xx.h1084 #define ADC_AWD1TR_LT1_7 (0x080UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000080 */ macro
1115 #define ADC_TR1_LT1_7 ADC_AWD1TR_LT1_7
Dstm32g061xx.h1131 #define ADC_AWD1TR_LT1_7 (0x080UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000080 */ macro
1162 #define ADC_TR1_LT1_7 ADC_AWD1TR_LT1_7
Dstm32g071xx.h1133 #define ADC_AWD1TR_LT1_7 (0x080UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000080 */ macro
1164 #define ADC_TR1_LT1_7 ADC_AWD1TR_LT1_7
Dstm32g081xx.h1180 #define ADC_AWD1TR_LT1_7 (0x080UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000080 */ macro
1211 #define ADC_TR1_LT1_7 ADC_AWD1TR_LT1_7
Dstm32g0b0xx.h1082 #define ADC_AWD1TR_LT1_7 (0x080UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000080 */ macro
1113 #define ADC_TR1_LT1_7 ADC_AWD1TR_LT1_7
Dstm32g0c1xx.h1347 #define ADC_AWD1TR_LT1_7 (0x080UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000080 */ macro
1378 #define ADC_TR1_LT1_7 ADC_AWD1TR_LT1_7
Dstm32g0b1xx.h1300 #define ADC_AWD1TR_LT1_7 (0x080UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000080 */ macro
1331 #define ADC_TR1_LT1_7 ADC_AWD1TR_LT1_7
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h1307 #define ADC_AWD1TR_LT1_7 (0x080UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000080 */ macro
1338 #define ADC_TR1_LT1_7 ADC_AWD1TR_LT1_7
Dstm32wle5xx.h1307 #define ADC_AWD1TR_LT1_7 (0x080UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000080 */ macro
1338 #define ADC_TR1_LT1_7 ADC_AWD1TR_LT1_7
Dstm32wl5mxx.h1489 #define ADC_AWD1TR_LT1_7 (0x080UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000080 */ macro
1520 #define ADC_TR1_LT1_7 ADC_AWD1TR_LT1_7
Dstm32wl54xx.h1489 #define ADC_AWD1TR_LT1_7 (0x080UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000080 */ macro
1520 #define ADC_TR1_LT1_7 ADC_AWD1TR_LT1_7
Dstm32wl55xx.h1489 #define ADC_AWD1TR_LT1_7 (0x080UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000080 */ macro
1520 #define ADC_TR1_LT1_7 ADC_AWD1TR_LT1_7
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h1426 #define ADC_AWD1TR_LT1_7 (0x080UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000080 */ macro
Dstm32wba52xx.h1907 #define ADC_AWD1TR_LT1_7 (0x080UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000080 */ macro
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h1223 #define ADC_AWD1TR_LT1_7 (0x080UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000080 */ macro
Dstm32u083xx.h1376 #define ADC_AWD1TR_LT1_7 (0x080UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000080 */ macro
Dstm32u073xx.h1340 #define ADC_AWD1TR_LT1_7 (0x080UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000080 */ macro

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