Home
last modified time | relevance | path

Searched refs:ADC_AWD1TR_LT1_6 (Results 1 – 25 of 40) sorted by relevance

12

/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h932 #define ADC_AWD1TR_LT1_6 (0x040UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000040 */ macro
963 #define ADC_TR1_LT1_6 ADC_AWD1TR_LT1_6
Dstm32c031xx.h936 #define ADC_AWD1TR_LT1_6 (0x040UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000040 */ macro
967 #define ADC_TR1_LT1_6 ADC_AWD1TR_LT1_6
Dstm32c071xx.h1013 #define ADC_AWD1TR_LT1_6 (0x040UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000040 */ macro
1044 #define ADC_TR1_LT1_6 ADC_AWD1TR_LT1_6
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h977 #define ADC_AWD1TR_LT1_6 (0x040UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000040 */ macro
1008 #define ADC_TR1_LT1_6 ADC_AWD1TR_LT1_6
Dstm32g050xx.h996 #define ADC_AWD1TR_LT1_6 (0x040UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000040 */ macro
1027 #define ADC_TR1_LT1_6 ADC_AWD1TR_LT1_6
Dstm32g070xx.h999 #define ADC_AWD1TR_LT1_6 (0x040UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000040 */ macro
1030 #define ADC_TR1_LT1_6 ADC_AWD1TR_LT1_6
Dstm32g031xx.h1020 #define ADC_AWD1TR_LT1_6 (0x040UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000040 */ macro
1051 #define ADC_TR1_LT1_6 ADC_AWD1TR_LT1_6
Dstm32g041xx.h1067 #define ADC_AWD1TR_LT1_6 (0x040UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000040 */ macro
1098 #define ADC_TR1_LT1_6 ADC_AWD1TR_LT1_6
Dstm32g051xx.h1083 #define ADC_AWD1TR_LT1_6 (0x040UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000040 */ macro
1114 #define ADC_TR1_LT1_6 ADC_AWD1TR_LT1_6
Dstm32g061xx.h1130 #define ADC_AWD1TR_LT1_6 (0x040UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000040 */ macro
1161 #define ADC_TR1_LT1_6 ADC_AWD1TR_LT1_6
Dstm32g071xx.h1132 #define ADC_AWD1TR_LT1_6 (0x040UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000040 */ macro
1163 #define ADC_TR1_LT1_6 ADC_AWD1TR_LT1_6
Dstm32g081xx.h1179 #define ADC_AWD1TR_LT1_6 (0x040UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000040 */ macro
1210 #define ADC_TR1_LT1_6 ADC_AWD1TR_LT1_6
Dstm32g0b0xx.h1081 #define ADC_AWD1TR_LT1_6 (0x040UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000040 */ macro
1112 #define ADC_TR1_LT1_6 ADC_AWD1TR_LT1_6
Dstm32g0c1xx.h1346 #define ADC_AWD1TR_LT1_6 (0x040UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000040 */ macro
1377 #define ADC_TR1_LT1_6 ADC_AWD1TR_LT1_6
Dstm32g0b1xx.h1299 #define ADC_AWD1TR_LT1_6 (0x040UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000040 */ macro
1330 #define ADC_TR1_LT1_6 ADC_AWD1TR_LT1_6
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h1306 #define ADC_AWD1TR_LT1_6 (0x040UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000040 */ macro
1337 #define ADC_TR1_LT1_6 ADC_AWD1TR_LT1_6
Dstm32wle5xx.h1306 #define ADC_AWD1TR_LT1_6 (0x040UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000040 */ macro
1337 #define ADC_TR1_LT1_6 ADC_AWD1TR_LT1_6
Dstm32wl5mxx.h1488 #define ADC_AWD1TR_LT1_6 (0x040UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000040 */ macro
1519 #define ADC_TR1_LT1_6 ADC_AWD1TR_LT1_6
Dstm32wl54xx.h1488 #define ADC_AWD1TR_LT1_6 (0x040UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000040 */ macro
1519 #define ADC_TR1_LT1_6 ADC_AWD1TR_LT1_6
Dstm32wl55xx.h1488 #define ADC_AWD1TR_LT1_6 (0x040UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000040 */ macro
1519 #define ADC_TR1_LT1_6 ADC_AWD1TR_LT1_6
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h1425 #define ADC_AWD1TR_LT1_6 (0x040UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000040 */ macro
Dstm32wba52xx.h1906 #define ADC_AWD1TR_LT1_6 (0x040UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000040 */ macro
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h1222 #define ADC_AWD1TR_LT1_6 (0x040UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000040 */ macro
Dstm32u083xx.h1375 #define ADC_AWD1TR_LT1_6 (0x040UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000040 */ macro
Dstm32u073xx.h1339 #define ADC_AWD1TR_LT1_6 (0x040UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000040 */ macro

12