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Searched refs:ADC_AWD1TR_LT1_10 (Results 1 – 25 of 40) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h936 #define ADC_AWD1TR_LT1_10 (0x400UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000400 */ macro
967 #define ADC_TR1_LT1_10 ADC_AWD1TR_LT1_10
Dstm32c031xx.h940 #define ADC_AWD1TR_LT1_10 (0x400UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000400 */ macro
971 #define ADC_TR1_LT1_10 ADC_AWD1TR_LT1_10
Dstm32c071xx.h1017 #define ADC_AWD1TR_LT1_10 (0x400UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000400 */ macro
1048 #define ADC_TR1_LT1_10 ADC_AWD1TR_LT1_10
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h981 #define ADC_AWD1TR_LT1_10 (0x400UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000400 */ macro
1012 #define ADC_TR1_LT1_10 ADC_AWD1TR_LT1_10
Dstm32g050xx.h1000 #define ADC_AWD1TR_LT1_10 (0x400UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000400 */ macro
1031 #define ADC_TR1_LT1_10 ADC_AWD1TR_LT1_10
Dstm32g070xx.h1003 #define ADC_AWD1TR_LT1_10 (0x400UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000400 */ macro
1034 #define ADC_TR1_LT1_10 ADC_AWD1TR_LT1_10
Dstm32g031xx.h1024 #define ADC_AWD1TR_LT1_10 (0x400UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000400 */ macro
1055 #define ADC_TR1_LT1_10 ADC_AWD1TR_LT1_10
Dstm32g041xx.h1071 #define ADC_AWD1TR_LT1_10 (0x400UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000400 */ macro
1102 #define ADC_TR1_LT1_10 ADC_AWD1TR_LT1_10
Dstm32g051xx.h1087 #define ADC_AWD1TR_LT1_10 (0x400UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000400 */ macro
1118 #define ADC_TR1_LT1_10 ADC_AWD1TR_LT1_10
Dstm32g061xx.h1134 #define ADC_AWD1TR_LT1_10 (0x400UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000400 */ macro
1165 #define ADC_TR1_LT1_10 ADC_AWD1TR_LT1_10
Dstm32g071xx.h1136 #define ADC_AWD1TR_LT1_10 (0x400UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000400 */ macro
1167 #define ADC_TR1_LT1_10 ADC_AWD1TR_LT1_10
Dstm32g081xx.h1183 #define ADC_AWD1TR_LT1_10 (0x400UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000400 */ macro
1214 #define ADC_TR1_LT1_10 ADC_AWD1TR_LT1_10
Dstm32g0b0xx.h1085 #define ADC_AWD1TR_LT1_10 (0x400UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000400 */ macro
1116 #define ADC_TR1_LT1_10 ADC_AWD1TR_LT1_10
Dstm32g0c1xx.h1350 #define ADC_AWD1TR_LT1_10 (0x400UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000400 */ macro
1381 #define ADC_TR1_LT1_10 ADC_AWD1TR_LT1_10
Dstm32g0b1xx.h1303 #define ADC_AWD1TR_LT1_10 (0x400UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000400 */ macro
1334 #define ADC_TR1_LT1_10 ADC_AWD1TR_LT1_10
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h1310 #define ADC_AWD1TR_LT1_10 (0x400UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000400 */ macro
1341 #define ADC_TR1_LT1_10 ADC_AWD1TR_LT1_10
Dstm32wle5xx.h1310 #define ADC_AWD1TR_LT1_10 (0x400UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000400 */ macro
1341 #define ADC_TR1_LT1_10 ADC_AWD1TR_LT1_10
Dstm32wl5mxx.h1492 #define ADC_AWD1TR_LT1_10 (0x400UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000400 */ macro
1523 #define ADC_TR1_LT1_10 ADC_AWD1TR_LT1_10
Dstm32wl54xx.h1492 #define ADC_AWD1TR_LT1_10 (0x400UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000400 */ macro
1523 #define ADC_TR1_LT1_10 ADC_AWD1TR_LT1_10
Dstm32wl55xx.h1492 #define ADC_AWD1TR_LT1_10 (0x400UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000400 */ macro
1523 #define ADC_TR1_LT1_10 ADC_AWD1TR_LT1_10
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h1429 #define ADC_AWD1TR_LT1_10 (0x400UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000400 */ macro
Dstm32wba52xx.h1910 #define ADC_AWD1TR_LT1_10 (0x400UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000400 */ macro
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h1226 #define ADC_AWD1TR_LT1_10 (0x400UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000400 */ macro
Dstm32u083xx.h1379 #define ADC_AWD1TR_LT1_10 (0x400UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000400 */ macro
Dstm32u073xx.h1343 #define ADC_AWD1TR_LT1_10 (0x400UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000400 */ macro

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