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Searched refs:ADC_AWD1TR_LT1_1 (Results 1 – 25 of 40) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h927 #define ADC_AWD1TR_LT1_1 (0x002UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000002 */ macro
958 #define ADC_TR1_LT1_1 ADC_AWD1TR_LT1_1
Dstm32c031xx.h931 #define ADC_AWD1TR_LT1_1 (0x002UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000002 */ macro
962 #define ADC_TR1_LT1_1 ADC_AWD1TR_LT1_1
Dstm32c071xx.h1008 #define ADC_AWD1TR_LT1_1 (0x002UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000002 */ macro
1039 #define ADC_TR1_LT1_1 ADC_AWD1TR_LT1_1
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h972 #define ADC_AWD1TR_LT1_1 (0x002UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000002 */ macro
1003 #define ADC_TR1_LT1_1 ADC_AWD1TR_LT1_1
Dstm32g050xx.h991 #define ADC_AWD1TR_LT1_1 (0x002UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000002 */ macro
1022 #define ADC_TR1_LT1_1 ADC_AWD1TR_LT1_1
Dstm32g070xx.h994 #define ADC_AWD1TR_LT1_1 (0x002UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000002 */ macro
1025 #define ADC_TR1_LT1_1 ADC_AWD1TR_LT1_1
Dstm32g031xx.h1015 #define ADC_AWD1TR_LT1_1 (0x002UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000002 */ macro
1046 #define ADC_TR1_LT1_1 ADC_AWD1TR_LT1_1
Dstm32g041xx.h1062 #define ADC_AWD1TR_LT1_1 (0x002UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000002 */ macro
1093 #define ADC_TR1_LT1_1 ADC_AWD1TR_LT1_1
Dstm32g051xx.h1078 #define ADC_AWD1TR_LT1_1 (0x002UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000002 */ macro
1109 #define ADC_TR1_LT1_1 ADC_AWD1TR_LT1_1
Dstm32g061xx.h1125 #define ADC_AWD1TR_LT1_1 (0x002UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000002 */ macro
1156 #define ADC_TR1_LT1_1 ADC_AWD1TR_LT1_1
Dstm32g071xx.h1127 #define ADC_AWD1TR_LT1_1 (0x002UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000002 */ macro
1158 #define ADC_TR1_LT1_1 ADC_AWD1TR_LT1_1
Dstm32g081xx.h1174 #define ADC_AWD1TR_LT1_1 (0x002UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000002 */ macro
1205 #define ADC_TR1_LT1_1 ADC_AWD1TR_LT1_1
Dstm32g0b0xx.h1076 #define ADC_AWD1TR_LT1_1 (0x002UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000002 */ macro
1107 #define ADC_TR1_LT1_1 ADC_AWD1TR_LT1_1
Dstm32g0c1xx.h1341 #define ADC_AWD1TR_LT1_1 (0x002UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000002 */ macro
1372 #define ADC_TR1_LT1_1 ADC_AWD1TR_LT1_1
Dstm32g0b1xx.h1294 #define ADC_AWD1TR_LT1_1 (0x002UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000002 */ macro
1325 #define ADC_TR1_LT1_1 ADC_AWD1TR_LT1_1
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h1301 #define ADC_AWD1TR_LT1_1 (0x002UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000002 */ macro
1332 #define ADC_TR1_LT1_1 ADC_AWD1TR_LT1_1
Dstm32wle5xx.h1301 #define ADC_AWD1TR_LT1_1 (0x002UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000002 */ macro
1332 #define ADC_TR1_LT1_1 ADC_AWD1TR_LT1_1
Dstm32wl5mxx.h1483 #define ADC_AWD1TR_LT1_1 (0x002UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000002 */ macro
1514 #define ADC_TR1_LT1_1 ADC_AWD1TR_LT1_1
Dstm32wl54xx.h1483 #define ADC_AWD1TR_LT1_1 (0x002UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000002 */ macro
1514 #define ADC_TR1_LT1_1 ADC_AWD1TR_LT1_1
Dstm32wl55xx.h1483 #define ADC_AWD1TR_LT1_1 (0x002UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000002 */ macro
1514 #define ADC_TR1_LT1_1 ADC_AWD1TR_LT1_1
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h1420 #define ADC_AWD1TR_LT1_1 (0x002UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000002 */ macro
Dstm32wba52xx.h1901 #define ADC_AWD1TR_LT1_1 (0x002UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000002 */ macro
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h1217 #define ADC_AWD1TR_LT1_1 (0x002UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000002 */ macro
Dstm32u083xx.h1370 #define ADC_AWD1TR_LT1_1 (0x002UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000002 */ macro
Dstm32u073xx.h1334 #define ADC_AWD1TR_LT1_1 (0x002UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000002 */ macro

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