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Searched refs:ADC_AWD1TR_LT1_0 (Results 1 – 25 of 40) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h926 #define ADC_AWD1TR_LT1_0 (0x001UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000001 */ macro
957 #define ADC_TR1_LT1_0 ADC_AWD1TR_LT1_0
Dstm32c031xx.h930 #define ADC_AWD1TR_LT1_0 (0x001UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000001 */ macro
961 #define ADC_TR1_LT1_0 ADC_AWD1TR_LT1_0
Dstm32c071xx.h1007 #define ADC_AWD1TR_LT1_0 (0x001UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000001 */ macro
1038 #define ADC_TR1_LT1_0 ADC_AWD1TR_LT1_0
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h971 #define ADC_AWD1TR_LT1_0 (0x001UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000001 */ macro
1002 #define ADC_TR1_LT1_0 ADC_AWD1TR_LT1_0
Dstm32g050xx.h990 #define ADC_AWD1TR_LT1_0 (0x001UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000001 */ macro
1021 #define ADC_TR1_LT1_0 ADC_AWD1TR_LT1_0
Dstm32g070xx.h993 #define ADC_AWD1TR_LT1_0 (0x001UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000001 */ macro
1024 #define ADC_TR1_LT1_0 ADC_AWD1TR_LT1_0
Dstm32g031xx.h1014 #define ADC_AWD1TR_LT1_0 (0x001UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000001 */ macro
1045 #define ADC_TR1_LT1_0 ADC_AWD1TR_LT1_0
Dstm32g041xx.h1061 #define ADC_AWD1TR_LT1_0 (0x001UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000001 */ macro
1092 #define ADC_TR1_LT1_0 ADC_AWD1TR_LT1_0
Dstm32g051xx.h1077 #define ADC_AWD1TR_LT1_0 (0x001UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000001 */ macro
1108 #define ADC_TR1_LT1_0 ADC_AWD1TR_LT1_0
Dstm32g061xx.h1124 #define ADC_AWD1TR_LT1_0 (0x001UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000001 */ macro
1155 #define ADC_TR1_LT1_0 ADC_AWD1TR_LT1_0
Dstm32g071xx.h1126 #define ADC_AWD1TR_LT1_0 (0x001UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000001 */ macro
1157 #define ADC_TR1_LT1_0 ADC_AWD1TR_LT1_0
Dstm32g081xx.h1173 #define ADC_AWD1TR_LT1_0 (0x001UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000001 */ macro
1204 #define ADC_TR1_LT1_0 ADC_AWD1TR_LT1_0
Dstm32g0b0xx.h1075 #define ADC_AWD1TR_LT1_0 (0x001UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000001 */ macro
1106 #define ADC_TR1_LT1_0 ADC_AWD1TR_LT1_0
Dstm32g0c1xx.h1340 #define ADC_AWD1TR_LT1_0 (0x001UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000001 */ macro
1371 #define ADC_TR1_LT1_0 ADC_AWD1TR_LT1_0
Dstm32g0b1xx.h1293 #define ADC_AWD1TR_LT1_0 (0x001UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000001 */ macro
1324 #define ADC_TR1_LT1_0 ADC_AWD1TR_LT1_0
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h1300 #define ADC_AWD1TR_LT1_0 (0x001UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000001 */ macro
1331 #define ADC_TR1_LT1_0 ADC_AWD1TR_LT1_0
Dstm32wle5xx.h1300 #define ADC_AWD1TR_LT1_0 (0x001UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000001 */ macro
1331 #define ADC_TR1_LT1_0 ADC_AWD1TR_LT1_0
Dstm32wl5mxx.h1482 #define ADC_AWD1TR_LT1_0 (0x001UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000001 */ macro
1513 #define ADC_TR1_LT1_0 ADC_AWD1TR_LT1_0
Dstm32wl54xx.h1482 #define ADC_AWD1TR_LT1_0 (0x001UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000001 */ macro
1513 #define ADC_TR1_LT1_0 ADC_AWD1TR_LT1_0
Dstm32wl55xx.h1482 #define ADC_AWD1TR_LT1_0 (0x001UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000001 */ macro
1513 #define ADC_TR1_LT1_0 ADC_AWD1TR_LT1_0
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h1419 #define ADC_AWD1TR_LT1_0 (0x001UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000001 */ macro
Dstm32wba52xx.h1900 #define ADC_AWD1TR_LT1_0 (0x001UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000001 */ macro
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h1216 #define ADC_AWD1TR_LT1_0 (0x001UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000001 */ macro
Dstm32u083xx.h1369 #define ADC_AWD1TR_LT1_0 (0x001UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000001 */ macro
Dstm32u073xx.h1333 #define ADC_AWD1TR_LT1_0 (0x001UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000001 */ macro

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