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Searched refs:SVMCR (Results 1 – 21 of 21) sorted by relevance

/hal_stm32-3.5.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_pwr.h1861 MODIFY_REG(PWR->SVMCR, PWR_SVMCR_PVDLS, PVDLevel); in LL_PWR_SetPVDLevel()
1879 return (READ_BIT(PWR->SVMCR, PWR_SVMCR_PVDLS)); in LL_PWR_GetPVDLevel()
1889 SET_BIT(PWR->SVMCR, PWR_SVMCR_PVDE); in LL_PWR_EnablePVD()
1899 CLEAR_BIT(PWR->SVMCR, PWR_SVMCR_PVDE); in LL_PWR_DisablePVD()
1909 return ((READ_BIT(PWR->SVMCR, PWR_SVMCR_PVDE) == (PWR_SVMCR_PVDE)) ? 1UL : 0UL); in LL_PWR_IsEnabledPVD()
1919 SET_BIT(PWR->SVMCR, PWR_SVMCR_USV); in LL_PWR_EnableVddUSB()
1930 CLEAR_BIT(PWR->SVMCR, PWR_SVMCR_USV); in LL_PWR_DisableVddUSB()
1941 return ((READ_BIT(PWR->SVMCR, PWR_SVMCR_USV) == (PWR_SVMCR_USV)) ? 1UL : 0UL); in LL_PWR_IsEnabledVddUSB()
1952 SET_BIT(PWR->SVMCR, PWR_SVMCR_IO2SV); in LL_PWR_EnableVddIO2()
1963 CLEAR_BIT(PWR->SVMCR, PWR_SVMCR_IO2SV); in LL_PWR_DisableVddIO2()
[all …]
/hal_stm32-3.5.0/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_pwr_ex.c1241 SET_BIT(PWR->SVMCR, PWR_SVMCR_USV); in HAL_PWREx_EnableVddUSB()
1250 CLEAR_BIT(PWR->SVMCR, PWR_SVMCR_USV); in HAL_PWREx_DisableVddUSB()
1261 SET_BIT(PWR->SVMCR, PWR_SVMCR_IO2SV); in HAL_PWREx_EnableVddIO2()
1270 CLEAR_BIT(PWR->SVMCR, PWR_SVMCR_IO2SV); in HAL_PWREx_DisableVddIO2()
1281 SET_BIT(PWR->SVMCR, PWR_SVMCR_ASV); in HAL_PWREx_EnableVddA()
1290 CLEAR_BIT(PWR->SVMCR, PWR_SVMCR_ASV); in HAL_PWREx_DisableVddA()
1299 SET_BIT(PWR->SVMCR, PWR_SVMCR_UVMEN); in HAL_PWREx_EnableUVM()
1308 CLEAR_BIT(PWR->SVMCR, PWR_SVMCR_UVMEN); in HAL_PWREx_DisableUVM()
1317 SET_BIT(PWR->SVMCR, PWR_SVMCR_IO2VMEN); in HAL_PWREx_EnableIO2VM()
1326 CLEAR_BIT(PWR->SVMCR, PWR_SVMCR_IO2VMEN); in HAL_PWREx_DisableIO2VM()
[all …]
Dstm32u5xx_hal_pwr.c400 MODIFY_REG(PWR->SVMCR, PWR_SVMCR_PVDLS, pConfigPVD->PVDLevel); in HAL_PWR_ConfigPVD()
441 SET_BIT(PWR->SVMCR, PWR_SVMCR_PVDE); in HAL_PWR_EnablePVD()
450 CLEAR_BIT(PWR->SVMCR, PWR_SVMCR_PVDE); in HAL_PWR_DisablePVD()
/hal_stm32-3.5.0/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_pwr.h746 MODIFY_REG(PWR->SVMCR, PWR_SVMCR_PVDLS, PVDLevel); in LL_PWR_SetPVDLevel()
764 return (READ_BIT(PWR->SVMCR, PWR_SVMCR_PVDLS)); in LL_PWR_GetPVDLevel()
774 SET_BIT(PWR->SVMCR, PWR_SVMCR_PVDE); in LL_PWR_EnablePVD()
784 CLEAR_BIT(PWR->SVMCR, PWR_SVMCR_PVDE); in LL_PWR_DisablePVD()
794 return ((READ_BIT(PWR->SVMCR, PWR_SVMCR_PVDE) == (PWR_SVMCR_PVDE)) ? 1UL : 0UL); in LL_PWR_IsEnabledPVD()
/hal_stm32-3.5.0/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_pwr.c400 MODIFY_REG(PWR->SVMCR, PWR_SVMCR_PVDLS, sConfigPVD->PVDLevel); in HAL_PWR_ConfigPVD()
441 SET_BIT(PWR->SVMCR, PWR_SVMCR_PVDE); in HAL_PWR_EnablePVD()
450 CLEAR_BIT(PWR->SVMCR, PWR_SVMCR_PVDE); in HAL_PWR_DisablePVD()
/hal_stm32-3.5.0/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h504 …__IO uint32_t SVMCR; /*!< PWR supply voltage monitoring control register, Address off… member
Dstm32wba52xx.h594 …__IO uint32_t SVMCR; /*!< PWR supply voltage monitoring control register, Address off… member
Dstm32wba54xx.h620 …__IO uint32_t SVMCR; /*!< PWR supply voltage monitoring control register, Address off… member
Dstm32wba55xx.h620 …__IO uint32_t SVMCR; /*!< PWR supply voltage monitoring control register, Address off… member
/hal_stm32-3.5.0/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h895 …__IO uint32_t SVMCR; /*!< Power supply voltage monitoring control register, Address offset: 0x… member
Dstm32u535xx.h829 …__IO uint32_t SVMCR; /*!< Power supply voltage monitoring control register, Address offset: 0x… member
Dstm32u575xx.h892 …__IO uint32_t SVMCR; /*!< Power supply voltage monitoring control register, Address offset: 0x… member
Dstm32u5a5xx.h996 …__IO uint32_t SVMCR; /*!< Power supply voltage monitoring control register, Address offset: 0x… member
Dstm32u585xx.h959 …__IO uint32_t SVMCR; /*!< Power supply voltage monitoring control register, Address offset: 0x… member
Dstm32u5f7xx.h1090 …__IO uint32_t SVMCR; /*!< Power supply voltage monitoring control register, Address offset: 0x… member
Dstm32u595xx.h929 …__IO uint32_t SVMCR; /*!< Power supply voltage monitoring control register, Address offset: 0x… member
Dstm32u599xx.h1110 …__IO uint32_t SVMCR; /*!< Power supply voltage monitoring control register, Address offset: 0x… member
Dstm32u5g7xx.h1157 …__IO uint32_t SVMCR; /*!< Power supply voltage monitoring control register, Address offset: 0x… member
Dstm32u5a9xx.h1177 …__IO uint32_t SVMCR; /*!< Power supply voltage monitoring control register, Address offset: 0x… member
Dstm32u5g9xx.h1261 …__IO uint32_t SVMCR; /*!< Power supply voltage monitoring control register, Address offset: 0x… member
Dstm32u5f9xx.h1194 …__IO uint32_t SVMCR; /*!< Power supply voltage monitoring control register, Address offset: 0x… member